MAT12 Analog Devices, MAT12 Datasheet

MAT12

Manufacturer Part Number

MAT12

Description

Matched Dual Monolithic Transistor

Manufacturer

Analog Devices

Datasheet

1.MAT12.pdf (4 pages)

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Preliminary Technical Data

FEATURES

Low offset voltage (V

Very Low Voltage Noise: 1nV/√Hz max @ 100Hz

High Gain (h

Excellent Log Conformance: r

Low Offset Voltage Drift: 0.1 μV/ºC max

High Gain Bandwidth Product: 200MHz

GENERAL DESCRIPTION

The design of the MAT12 series of NPN dual monolithic transistors is optimized for very low noise, low drift and

low r

which is maintained over a wide range of collector current. Device performance is specified over the full

temperature range as well as at 25°C.

Input protection diodes are provided across the emitter-base junctions to prevent degradation of the device

characteristics due to reverse-biased emitter current. The substrate is clamped to the most negative emitter by the

parasitic isolation junction created by the protection diodes. This results in complete isolation between the

transistors.

The MAT12 is ideal for applications where low noise is a priority. The MAT12 can be used as an input

stage to make an amplifier with noise voltage of less than 1.0 nV/√Hz at 100 Hz. Other applications, such as

log/antilog circuits, may use the excellent logging conformity of the MAT12. Typical bulk resistance is only 0.3

Ω to 0.4 Ω. The MAT12 electrical characteristics approach those of an ideal transistor when operated over a

collector current range of 1µA to 10 mA.

Rev. PrA

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

500 min at I

300 min at I

. Exceptional characteristics of the MAT12 include offset voltage of 50 µV max and high current gain (h

= 1mA

= 1μA

): 50 μV max

= 0.3 Ω

Note: Substrate is connected to case on TO-78 package. Substrate is

normally connected to the most negative circuit potential, but can

be floated

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

Dual Monolithic Transistor

PIN CONFIGURATION

Low Noise, Matched

www.DataSheet4U.com

)

www.analog.com

MAT12

Related parts for MAT12

MAT12 Summary of contents

Page 1

... Low Offset Voltage Drift: 0.1 μV/ºC max High Gain Bandwidth Product: 200MHz GENERAL DESCRIPTION The design of the MAT12 series of NPN dual monolithic transistors is optimized for very low noise, low drift and . Exceptional characteristics of the MAT12 include offset voltage of 50 µV max and high current gain (h low r BE which is maintained over a wide range of collector current ...

Page 2

... MAT12 SPECIFICATIONS ELECTRICAL CHARACTERISTICS 10μ 25°C, unless otherwise specified Table 1. Parameter Current Gain Current Gain Match Noise Voltage Density Offset Voltage Offset Voltage Change vs Offset Voltage Change vs Offset Voltage Drift Breakdown Voltage Gain-Bandwidth Product ...

Page 3

... swept from (100(Δ )/ min swept from 0V to 40V CBO Rev. PrA | Page www.DataSheet4U.com 0.05 0.1 23 0.3 0 the indicated collector currents. MAX C MAT12 pA/ºC pA Ω pF ...

Page 4

... MAT12 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Collector-Base Voltage (BV ) CBO Collector-Emitter Voltage (BV ) CEO Collector-Collector Voltage ( Emitter-Emitter Voltage ( Collector Current ( Emitter Current ( Storage Temperature Range H Packages Operating Temperature Range Junction Temperature Range RM, CP Packages Lead Temperature (Soldering, 60 sec) 1 Differential input voltage is limited the supply voltage, whichever is less ...

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