CS4361 Cirrus Logic, CS4361 Datasheet

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CS4361

Manufacturer Part Number
CS4361
Description
6-channel D/A Converter
Manufacturer
Cirrus Logic
Datasheet

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Features
Advance Product Information
http://www.cirrus.com
Multi-bit Delta-sigma Modulator
24-bit Conversion
Automatically detects sample rates up to
192 kHz.
105 dB Dynamic Range
-95 dB THD+N
Low Clock Jitter Sensitivity
+3.3 V or +5 V Core Power
+1.8 V to +5 V Interface Power
Filtered Line Level Outputs
On-chip Digital De-emphasis
Popguard
Mute Output Control
Small 20-pin TSSOP Package
+5 Volt-tolerant Reset
I
20-pin, 24-bit, 192 kHz, 6-channel D/A Converter
Mode Control
Audio Input
PCM Serial
Serial Audio Port & Control Supply
Technology
(1.8 V to 5 V)
Detecting PCM Serial
Auto-Speed
Interface
Copyright © Cirrus Logic, Inc. 2005
De-emphasis
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Digital
(All Rights Reserved)
6
Digital
Filters
Description
The CS4361 is a complete 6-channel digital-to-analog
output system including interpolation, multi-bit D/A
conversion, and output analog filtering in a small 20-pin
package. The CS4361 supports all major audio data
interface formats.
The CS4361 is based on a fourth order, multi-bit, delta-
sigma modulator with a linear analog low-pass filter. This
device also includes auto-speed mode detection using
both sample rate and master clock ratio as a method of
auto-selecting sampling rates between 2 kHz and
216 kHz.
The CS4361 contains on-chip digital de-emphasis, oper-
ates from a single +3.3 V or +5 V power supply with
separate built-in level shifter for the digital interface, and
requires minimal support circuitry. These features are
ideal for DVD players & recorders, digital televisions,
home theater and set top box products, and automotive
audio systems.
ORDERING INFORMATION
See page 20
Multi-bit ∆Σ
Analog & Digital Core Supply
Modulators
(3.3 V to 5 V)
Internal Voltage
Reference
Analog Filters
Switch-Cap
DAC and
External Mute
Control
CS4361
6
(Six Channels)
Single-Ended
Mute Control
DS672A2
Outputs
JAN ‘05

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CS4361 Summary of contents

Page 1

... The CS4361 supports all major audio data interface formats. The CS4361 is based on a fourth order, multi-bit, delta- sigma modulator with a linear analog low-pass filter. This device also includes auto-speed mode detection using ...

Page 2

... OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. 2 Table 1. Revision History Changes CS4361 DS672A2 ...

Page 3

... External Serial Clock Mode ................................................................................. 12 4.2.2 Internal Serial Clock Mode .................................................................................. 13 4.3 De-Emphasis ................................................................................................................... 15 4.4 Mode Select ..................................................................................................................... 15 4.5 Initialization and Power-Down ......................................................................................... 15 4.6 Output Transient Control ................................................................................................. 17 4.6.1 Power-up ............................................................................................................. 17 4.6.2 Power-down ........................................................................................................ 17 4.7 Grounding and Power Supply Decoupling ....................................................................... 17 4.8 Analog Output and Filtering ............................................................................................. 17 4.9 Mute Control .................................................................................................................... 18 5. PARAMETER DEFINITIONS .................................................................................................. 19 6. ORDERING INFORMATION .............................................................................................. 7. PACKAGE DIMENSIONS ...................................................................................................... 20 8. APPENDIX ......................................................................................................................... 21 DS672A2 CS4361 20 3 ...

Page 4

... Mute Control (Output) - Control signal for optional external muting circuitry. MODE 9 Mode Control (Input) - Selects operational modes (see table 3 RST CS4361 MUTEC AOUT1 AOUT2 AOUT3 AOUT4 VA GND AOUT5 AOUT6 VQ DS672A2 ...

Page 5

... WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. DS672A2 Symbol Min Nom VA 4.75 5.0 VA 3.0 3.3 VL 1.7 3.3 -CZZ - -DZZ -40 - Symbol Min VA -0 -0.3 IND V -0.3 IND T - -65 stg CS4361 Max Units 5.25 V 3.6 V 5.25 °C +70 °C +85 Max Units 6 ±10 mA VA+0.4 V VL+0.4 V 125 °C 150 °C 5 ...

Page 6

... DAC ANALOG CHARACTERISTICS Full-scale output sine wave, 997 Hz (Note 1 48/96/192 kHz; Test load R Measurement bandwidth kHz, unless otherwise specified. Parameter Dynamic Performance for CS4361-CZZ (-10 to 70°C) Dynamic Range 18 to 24-Bit 16-Bit Total Harmonic Distortion + Noise 18 to 24-Bit 16-Bit Dynamic Performance for CS4361-DZZ (-40 to 85° ...

Page 7

... Fs = 44.1 kHz - Double Speed Mode to -0.1 dB corner corner 0 -.05 .5770 (Note 3) 55 tgd - Quad Speed Mode to -0.1 dB corner corner 0 0 0.7 (Note 3) 51 tgd - CS4361 Typ Max Unit - .4780 Fs - .4996 10/ +.05/-. .4650 Fs - ...

Page 8

... 0 300 331 - 1.63 θ PSRR - 60 (60 Hz 125 100 2 Figure 2. Maximum Loading CS4361 Min Typ Max Units 70 30 10% V µ ± 3.3 V Nom Max Min Typ Max Units ...

Page 9

... SCLK t sclkr t sdlrs 10 9 --------------------- - ( 512 t sdh 10 9 --------------------- - ( 512 t sdh 10 9 --------------------- - ( 384 ± 1/2 MCLK period. CS4361 Min Typ Max - 216 134 108 100 216 168 216 ...

Page 10

... SCLK SDATA Figure 3. External Serial Mode Input Timing * The SCLK pulses shown are internal to the CS4361. LRCK MCLK *INTERNAL SCLK SDATA Figure 5. Internal Serial Clock Generation * The SCLK pulses shown are internal to the CS4361. ...

Page 11

... DEM/SCLK AOUT6 12 6 LRCK 20 MUTEC CS4361 7 MCLK Note* = This circuitry is intended for applications where the CS4361 connects directly to an unbalanced output of the design. For internal routing applications please see the DAC analog output characteristics for loading limitations. 8 RST 10 FILT+ 33µF 9 MODE ...

Page 12

... The CS4361 accepts data at standard audio sample rates including 48, 44.1 and 32 kHz in SSM, 96, 88.2 and 64 kHz in DSM, and 192, 176.4 and 128 kHz in QSM. Audio data is input via the serial data input pin (SDIN). The Left/Right Clock (LRCK) determines which channel is currently being input on SDIN, and the optional Serial Clock (SCLK) clocks audio data into the input data buffer ...

Page 13

... Left Justified 24-Bit Data INT SCLK = MCLK/LRCK = 1024, 512, 256, 128 INT SCLK = MCLK/LRCK = 768, 384, 192 INT SCLK = MCLK/LRCK = 1152 Figure 8. CS4361 Data Format (Left Justified) DS672A2 + LSB MSB - 24-Bit Data Data Valid on Rising Edge of SCLK Figure 7 ...

Page 14

... INT SCLK = MCLK/LRCK = 1024, 512, 256, 128 INT SCLK = MCLK/LRCK = 768, 384, 192 INT SCLK = MCLK/LRCK = 1152 Figure 9. CS4361 Data Format (Right Justified 24 ...

Page 15

... De-Emphasis The CS4361 includes on-chip digital de-emphasis. Figure 11 shows the de-emphasis curve for Fs equal to 44.1 kHz. The frequency response of the de-emphasis curve will scale proportionally with changes in sample rate, Fs. The de-emphasis filter is active (inactive) if the DEM/SCLK pin is low (high) for five consecutive falling edges of LRCK. This function is available only in the internal serial clock mode when LRCK < ...

Page 16

... USER: change MCLK/LRCK ratio USER: No SCLK SCLK mode = internal Normal Operation De-emphasis Analog Output is Generated Figure 12. CS4361 Initialization and Power-Down Sequence 16 USER: Apply Power Power-Down State VQ and outputs low USER: Apply MCLK, release RST VQ and outputs ramp up Wait State USER: Apply LRCK and MCLK ...

Page 17

... Analog Output and Filtering The analog filter present in the CS4361 is a switched-capacitor filter followed by a continuous-time, low-pass filter. Its response, combined with that of the digital interpolator, is given in Figures 14 - 21. The recommended external analog circuitry is shown in the “ ...

Page 18

... CMOS driver. See Figure 13 below for a suggested active-high mute circuit. AC Couple 4361 470 Ω Filter Cap 10 kΩ MMU N 2111LT1 10 kΩ MMU N 2211LT1 -V ( ila ble ) Figure 13. Suggested Active-low Mute Circuit CS4361 A udio kΩ 2 kΩ 6 (Low DS672A2 ...

Page 19

... Interchannel Gain Mismatch The gain difference between left and right channels. Units in decibels. Gain Error The deviation from the nominal full scale analog output for a full scale digital input. Gain Drift The change in gain value with temperature. Units in ppm/°C. DS672A2 CS4361 19 ...

Page 20

... MAX MIN -- 0.043 0.004 0.006 0.05 0.0354 0.037 0.85 0.0096 0.012 0.19 0.256 0.259 6.40 0.2519 0.256 6.30 0.1732 0.177 4.30 -- 0.026 0.024 0.028 0.50 4° 8° 0° JEDEC #: MO-153 Controlling Dimension is Millimeters. Package 1 E1 END VIEW L MILLIMETERS NOM MAX -- -- 1.10 -- 0.15 0.90 0.95 0.245 0.30 6.50 6.60 6.40 6.50 4.40 4. 0.65 0.60 0.70 4° 8° CS4361 ∝ NOTE 2 DS672A2 ...

Page 21

... Figure 14. Single Speed Stopband Rejection Figure 16. Single Speed Transition Band DS672A2 Figure 15. Single Speed Transition Band Figure 17. Single Speed Passband Ripple CS4361 21 ...

Page 22

... Figure 18. Double Speed Stopband Rejection Figure 20. Double Speed Transition Band 22 Figure 19. Double Speed Transition Band Figure 21. Double Speed Passband Ripple CS4361 DS672A2 ...

Page 23

... Frequency(normalized to Fs) Figure 22. Quad Speed Stopband Rejection 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 0.4 0.45 0.5 0.55 Frequency(normalized to Fs) Figure 24. Quad Speed Transition Band DS672A2 0 -10 -20 -30 -40 -50 -60 0.6 0.7 0.8 0.9 1 0.35 Figure 23. Quad Speed Transition Band 0.2 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 0.6 0.65 0.7 0.05 Figure 25. Quad Speed Passband Ripple CS4361 0.4 0.45 0.5 0.55 0.6 0.65 Frequency(normalized to Fs) 0.1 0.15 0.2 0.25 0.3 0.35 0.4 Frequency(normalized to Fs) 0.7 0.75 0.45 23 ...

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