CS4353 Cirrus Logic, CS4353 Datasheet - Page 17

• Manufacturer Part Number: CS4353
• Description: 3.3 V Stereo Audio DAC
• Manufacturer: Cirrus Logic

DS803PP1
4.5
4.6
De-Emphasis Control
The device includes on-chip digital de-emphasis.
44.1 kHz. The frequency response of the de-emphasis curve scales with changes in the sample rate, Fs.
The de-emphasis error will increase for sample rates other than 44.1 kHz.
When the DEM pin is connected to VL, the 44.1 kHz de-emphasis filter is activated. When the DEM pin is
connected to GND, the de-emphasis filter is turned off.
Note:
Internal Power-On Reset
The CS4353 features an internal power-on reset (POR) circuit. The POR circuit allows the RESET pin to be
connected to VL during power-up and power-down sequences if the external reset function is not needed.
This circuit monitors the VCP supply and automatically asserts or releases an internal reset of the DAC’s
digital circuitry when the supply reaches defined thresholds (see
ages” on page
When power is first applied, the POR circuit monitors the VCP supply voltage to determine when it reaches
a defined threshold, V
digital circuitry. Once the VCP supply reaches the secondary threshold, V
internal reset.
De-emphasis is only available in Single-Speed Mode.
(external)
RESET
DGND
VCP
11). No external clocks are required for the POR circuit to function.
on1
-10dB
. At this time, the POR circuit asserts the internal reset low, resetting all of the
Gain
Figure 8. Internal Power-On Reset Circuit
0dB
dB
Figure 7. De-Emphasis Curve, Fs = 44.1 kHz
Power-On Reset
3.183 kHz
T1=50 µs
Circuit
F1
Figure 7
10.61 kHz
F2
shows the de-emphasis curve for Fs equal to
T2 = 15 µs
Frequency
“Internal Power-On Reset Threshold Volt-
on2
, the POR circuit releases the
(internal)
reset
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CS4353
17