ST8016T Sitronix Technology, ST8016T Datasheet - Page 8

• Manufacturer Part Number: ST8016T
• Description: COM/SEG LCD Driver
• Manufacturer: Sitronix Technology

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Preliminary Ver 0.12
(Common mode)
/DISPOFF
SYMBOL
V
V
Y
V
LGND
12L
43L
GND
EIO
1
0L
ElO
V
L/R
MD
V
DI
FR
LP
-Y
, V
, V
, V
DD
SS
7
160
1
2
0R
12R
43R
LCD drive output pins
Logic system power supply pin
Ÿ Connected to +2.5 to +5.5 V.
Ground pin
Logic system power ground pin
Ÿ Do not short LGND with GND and Vss by ITO on LCD panel
Ÿ Connect it to GND on PCB or FPC.
Connect to GND by ITO on LCD panel.
Bias power supply pins for LCD drive voltage
Shift data input/output pin for bi-directional shift register
Shift data input/output pin for bi-directional shift register
Shift clock pulse input pin for bi-directional shift register
Input pin for selecting the shift direction of bi-directional shift register
Control input pin for output of non-select level
AC signal input pin for LCD drive waveform
Mode selection pin
Dual mode data input pin
Ÿ Corresponding directly to each bit of the data latch, one level (V
Ÿ Table of truth values is shown in "TRUTH TABLE" in Functional Operations.
Ÿ Normally use the bias voltages set by a resistor divider.
Ÿ Ensure that voltages are set such that V
Ÿ V
Ÿ Output pin when L/R is at LGND level "L', input pin when L/R is at V
Ÿ When L/R = H, ElO
Ÿ When L/R = L, ElO
Ÿ Refer to section 7.2.2.
Ÿ Input pin when L/R is at LGND level "L", output pin when L/R is at V
Ÿ When L/R = L, EIO
Ÿ When L/R = H, EIO
Ÿ Refer to section 7.2.2.
Ÿ * Data is shifted at the falling edge of the clock pulse.
Ÿ Data is shifted from Y
Ÿ Refer to section 7.2.2.
Ÿ The input signal is level-shifted from logic voltage level to LCD drive voltage level, and
Ÿ When set to LGND level "L", the LCD drive output pins (Y
Ÿ When set to "L”, the contents of the shift register are reset to not reading data. When the
Ÿ Table of truth-values is shown in "TRUTH TABLE" in Functional Operations.
Ÿ The input signal is level-shifted from logic voltage level to LCD drive voltage level, and
Ÿ Normally it inputs a frame inversion signal.
Ÿ The LCD drive output pins' output voltage levels can be set using the shift register output
Ÿ Table of truth-values is shown in "TRUTH TABLE" in Functional Operations.
Ÿ When set to LGND level "L", single mode operation is selected; when set to V
Ÿ Refer to section 7.2.2.
Ÿ According to the data shift direction of the data shift register, data can be input starting from
non-selected after 160 bits of data have been read.
output.
voltage that is assigned by specification for each power pin.
when set to V
controls the LCD drive circuit.
/DISPOFF function is canceled, the driver outputs non-select level (V
data is read at the next falling edge of the LP. At that time, if /DISPOFF removal time does
not correspond to what is shown in AC characteristics, the shift data is not read correctly.
controls the LCD drive circuit.
signal and the FR signal.
dual mode operation is selected.
the 81st bit.
iL
and V
iR
(i = 0,12, 43) must connect to an external power supply, and supply regular
DD
level "H".
1
2
1
2
is used as output pin, it won't be pulled down.
is used as input pin, it will be pulled down.
is used as input pin, it will be pulled down.
is used as output pin, it won't be pulled down.
160
to Y
1
Page 8/27
when set to LGND level "L", and data is shifted from Y
FUNCTION
SS
< V
43
< V
12
< V
0
1
.
-Y
160
) are set to level Vss.
0
, V
12
DD
DD
12
level "H".
level "H".
or V
or V
43
43
) is selected and
), and the shift
DD
level "H"
2007/10/29
ST8016T
1
to Y
160