MT9080BPR Zarlink Semiconductor, Inc., MT9080BPR Datasheet - Page 16

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MT9080BPR

Manufacturer Part Number
MT9080BPR
Description
SMX-Switch, SMX-Switch Matrix Module
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
MT9080B
Parallel-to-Serial Conversion
The SMX can be used in systems which employ
serial architectures by converting the parallel I/O into
a serial format. The Zarlink MT9085 Parallel Access
Circuit (PAC) is designed to interface to the parallel
busses of the SMX. A single PAC can convert the
output of a1024 channel switch into 2.048 Mbit/s or
4.096 Mbit/s serial format. A second PAC can be
configured to implement serial to parallel conversion
(see Figure 23).
The PAC generates all framing signals required to
implement a 1024 or 2048 channel matrix. Refer to
the MT9085 data sheet for more information on
operation of the PAC.
For more information, see Zarlink’s Application Note
MSAN-135 “Design of Large Digital Switching
Matrices using the SMX/PAC“.
2-116
S0
S31
OE CKD MCA MCB
S0
S31
2/4S
F0i
Source
Timing
C4i C16i
Figure 23 - 1024 Channel Serial Switch Matrix Using the PAC and SMX
PAC
S/P
CMOS
P0-P7
C16
DFPo
CFPo
+5
C4
F0
C16
8
C16
+5
CK
FP
D12
D0-D7i
CK
FP
Mz
R/W
ODE
MPU Interface
CONNECTION
SMX #2
CM - 1
MEMORY
DM - 1/2
SMX #1
MEMORY
D0-D9 D11
A0-A9 ME
DATA
10
D0-D7o
ODE
D10
Mx
My
Mz
CS
DS
Mx
My
8
+5
+5
NOTE: Connect all inputs not shown to V
F0 C4 C16
F0i C4i C16i
OE CKD MCA MCB
P0-P7
PAC
P/S
+5
2/4S
S31
S0
S0
S31
SS

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