CLA90000 Zarlink Semiconductor, CLA90000 Datasheet - Page 19

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CLA90000

Manufacturer Part Number
CLA90000
Description
High Density CMOS Gate Arrays
Manufacturer
Zarlink Semiconductor
Datasheet
I/O Cells
S means Schmitt input, I means inverting input. Each cell has
three variations of resistor connection and five drive strength
options as follows:
Pullup, pulldown, or no resistor indicated by r=U, D, or N.
Drive strength options indicated by dd=01, 02, 03, 06 or 12.
The final N in the name means noninverting output. The cells can
be used at other than 3 or 5 volts, but thresholds may then be out
of specification.
I/O Cells
As the tables above show, the cell library contains an
extensive range of I/Os, including cells for PCI/PC card
applications. Each I/O cell occupies one I/O location and
can be configured as an input, output or bidirectional, and
has one pad associated with it. The output section of the
I/O cell is configurable to one of four options: open drain,
open source, tristate, or push-pull by suitable connection
of the D and T inputs and each cell has a program pin that
controls the slew rate of the output signal.
ATSIrddN
ACSIrddN
BBSIrddN
DTSIrddN
DCSIrddN
DBSIrddN
DNSIrddN
Cell Name
Cell Name
Cell Name
5V I/O, Schmitt input (TTL)
5V I/O, Schmitt input (CMOS)
3V I/O, Schmitt input (TTL/CMOS)
5V I/O, Schmitt input (TTL)
5V I/O, Schmitt input (CMOS)
3V I/O, Schmitt input (TTL/CMOS, low noise)
3V I/O, Schmitt input (TTL/CMOS, low
power)
3V core with 3V and 5V I/O
5V Core and 5V I/O
3V core and 3V I/O
PACKAGING
I Wide range of surface mount and through board
I Various MQFP and ball grid array styles to international
I Ceramic equivalents to most plastic packages for fast
I Ongoing commitment to new package development
PACKAGING OPTIONS
The package style and pin count information is intended
only as a guide. Detailed package specifications are avail-
able from Zarlink Design Centres on request. New pack-
ages are being continually introduced, so if a particular
package is not listed, please enquire through your Zarlink
sales representative.
The package dimensions implicit in the package `Code,'
pitch and height dimensions are approximate and for guid-
ance only. If detailed information is required, an outline
drawing will be provided on request. All package dimen-
sions are in mm.
A stock is held of the preferred packages to ensure a fast
prototype assembly turn around. Alternative array size to
package combinations are available, but not always
stocked.
packages
and JEDEC standards
prototyping
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