MT16VDDF12864HG-26A Micron, MT16VDDF12864HG-26A Datasheet - Page 10
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MT16VDDF12864HG-26A
Manufacturer Part Number
MT16VDDF12864HG-26A
Description
DRAM_Module, high-speed CMOS, dynamic random-access, 512MB and 1GB memory modules organized in a x64 configuration
Manufacturer
Micron
Datasheet
1.MT16VDDF12864HG-26A.pdf
(29 pages)
BA1 = 0) and will retain the stored information until it
is programmed again or the device loses power. The
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0/ BA1 both LOW) to reset the DLL.
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either of
these requirements could result in unspecified opera-
tion.
DLL Enable/Disable
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled,
200 clock cycles must occur before a READ command
can be issued.
09005aef80a646bc
DDF16C64_128x64HG_A.fm - Rev. A 3/03 EN
The extended mode register must be loaded when
The DLL must be enabled for normal operation.
10
NOTE:
1. BA1 and BA0 (E14 and E13) must be “0, 1” to select
2. The QFC# option is not supported.
E13
0
–
the Extended Mode Register (vs. the base Mode
Register).
0 1
E12
Figure 6: Extended Mode Register
14
BA1 BA0
0
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1 1
13
E11
0
–
12
E10
A12
0
–
11
A11
E9
0
–
Definition Diagram
10
E8
A10
0
–
200-PIN DDR SODIMM
Operating Mode
E7
9
0
–
A9
E6 E5
0
–
8
A8
0
–
7
A7 A6 A5 A4 A3
512MB, 1GB (x64)
E4
0
–
6
E3
0
–
5
E2
0
–
4
2
3
E1,
Valid
–
2
E0
A2 A1 A0
DS
©2003, Micron Technology Inc.
1
E1
0
1
DLL
Operating Mode
Reserved
Reserved
0
ADVANCE
E0
0
1
Drive Strength
Extended Mode
Register (Ex)
Address Bus
Reduced
Normal
Disable
Enable
DLL