LM3311SQ National Semiconductor Corporation, LM3311SQ Datasheet - Page 20

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LM3311SQ

Manufacturer Part Number
LM3311SQ
Description
Step-up Pwm Dc/dc Converter With Integrated Ldo, Op-amp, And Gate Pulse Modulation Switch
Manufacturer
National Semiconductor Corporation
Datasheet

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4, the VGHM pin is driving a purely capacitive load, 4.7nF.
The value of resistor R1 is 15kohm, R2 is 1.1kΩ and R3 is
750Ω. In both transient plots, there is no C
FIGURE 3.
FIGURE 4.
E
delay capacitor.
20126385
20126386
20
In the GPM block diagram, a signal called “Reset” is shown.
This signal is generated from the V
thermal shutdown, or the SHDN pin. If the V
drops below 2.3V, typically, then the GPM block will be dis-
abled and the VGHM pin will discharge through NMOS switch
N2 and the 1kΩ resistor. This applies also if the junction tem-
perature of the device exceeds 145°C or if the SHDN signal
is low. As shown in the block diagram, both VDPM and VFLK
have internal 350kΩ pull down resistors. This puts both VDPM
and VFLK in normally “off” states. Typical VDPM and VFLK
pin currents can be found in the Typical Performance Char-
acteristics section.
IN
under-voltage lockout,
IN
supply voltage

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