LM3S8930 Luminary Micro, Inc, LM3S8930 Datasheet - Page 10

• Manufacturer Part Number: LM3S8930
• Description: Lm3s8930 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
List of Tables
Table 1.
Table 2.
Table 3-1.
Table 4-1.
Table 4-2.
Table 5-1.
Table 5-2.
Table 6-1.
Table 7-1.
Table 8-1.
Table 8-2.
Table 8-3.
Table 9-1.
Table 9-2.
Table 9-3.
Table 10-1.
Table 10-2.
Table 10-3.
Table 11-1.
Table 12-1.
Table 13-1.
Table 14-1.
Table 14-2.
Table 14-3.
Table 15-1.
Table 15-2.
Table 15-3.
Table 15-4.
Table 16-1.
Table 16-2.
Table 18-1.
Table 18-2.
Table 18-3.
Table 18-4.
Table 18-5.
Table 18-6.
Table 18-7.
Table 18-8.
Table 19-1.
Table 19-2.
Table 20-1.
Table 20-2.
Table 20-3.
Table 20-4.
Table 20-5.
Table 20-6.
10
Revision History .............................................................................................................. 18
Documentation Conventions ............................................................................................ 20
Memory Map ................................................................................................................... 42
Exception Types .............................................................................................................. 44
Interrupts ........................................................................................................................ 45
JTAG Port Pins Reset State ............................................................................................. 49
JTAG Instruction Register Commands ............................................................................... 54
System Control Register Map ........................................................................................... 67
Hibernation Module Register Map ................................................................................... 124
Flash Protection Policy Combinations ............................................................................. 138
Flash Resident Registers ............................................................................................... 140
Flash Register Map ........................................................................................................ 141
GPIO Pad Configuration Examples ................................................................................. 165
GPIO Interrupt Configuration Example ............................................................................ 165
GPIO Register Map ....................................................................................................... 166
Available CCP Pins ........................................................................................................ 203
16-Bit Timer With Prescaler Configurations ..................................................................... 206
Timers Register Map ...................................................................................................... 212
Watchdog Timer Register Map ........................................................................................ 239
UART Register Map ....................................................................................................... 267
SSI Register Map .......................................................................................................... 312
Examples of I
Inter-Integrated Circuit (I
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 356
Transmit Message Object Bit Settings ............................................................................. 377
Receive Message Object Bit Settings .............................................................................. 379
CAN Protocol Ranges .................................................................................................... 382
CAN Register Map ......................................................................................................... 385
TX & RX FIFO Organization ........................................................................................... 419
Ethernet Register Map ................................................................................................... 422
Signals by Pin Number ................................................................................................... 461
Signals by Signal Name ................................................................................................. 465
Signals by Function, Except for GPIO ............................................................................. 469
GPIO Pins and Alternate Functions ................................................................................. 471
Signals by Pin Number ................................................................................................... 472
Signals by Signal Name ................................................................................................. 477
Signals by Function, Except for GPIO ............................................................................. 481
GPIO Pins and Alternate Functions ................................................................................. 484
Temperature Characteristics ........................................................................................... 485
Thermal Characteristics ................................................................................................. 485
Maximum Ratings .......................................................................................................... 486
Recommended DC Operating Conditions ........................................................................ 486
LDO Regulator Characteristics ....................................................................................... 487
Detailed Power Specifications ........................................................................................ 488
Flash Memory Characteristics ........................................................................................ 489
Hibernation Module DC Characteristics ........................................................................... 489
2
C Master Timer Period versus Speed Mode ............................................... 342
2
C) Interface Register Map ......................................................... 351
Preliminary
July 25, 2008