LM3S6610 Luminary Micro, Inc, LM3S6610 Datasheet - Page 5

• Manufacturer Part Number: LM3S6610
• Description: Lm3s6610 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

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10.1
10.2
10.2.1 GPTM Reset Conditions .......................................................................................................... 212
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 212
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 213
10.3
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 217
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 218
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 218
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 219
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 219
10.3.6 16-Bit PWM Mode ................................................................................................................... 220
10.4
10.5
11
11.1
11.2
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 270
12.2.2 Baud-Rate Generation ............................................................................................................. 271
12.2.3 Data Transmission .................................................................................................................. 271
12.2.4 Serial IR (SIR) ......................................................................................................................... 272
12.2.5 FIFO Operation ....................................................................................................................... 273
12.2.6 Interrupts ................................................................................................................................ 273
12.2.7 Loopback Operation ................................................................................................................ 274
12.2.8 IrDA SIR block ........................................................................................................................ 274
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 311
13.2.2 FIFO Operation ....................................................................................................................... 311
13.2.3 Interrupts ................................................................................................................................ 311
13.2.4 Frame Formats ....................................................................................................................... 312
13.3
13.4
13.5
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14.1
July 25, 2008
General-Purpose Timers ................................................................................................. 210
Block Diagram ........................................................................................................................ 210
Functional Description ............................................................................................................. 211
Initialization and Configuration ................................................................................................. 217
Register Map .......................................................................................................................... 220
Register Descriptions .............................................................................................................. 221
Watchdog Timer ............................................................................................................... 246
Block Diagram ........................................................................................................................ 246
Functional Description ............................................................................................................. 246
Initialization and Configuration ................................................................................................. 247
Register Map .......................................................................................................................... 247
Register Descriptions .............................................................................................................. 248
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 269
Block Diagram ........................................................................................................................ 270
Functional Description ............................................................................................................. 270
Initialization and Configuration ................................................................................................. 274
Register Map .......................................................................................................................... 275
Register Descriptions .............................................................................................................. 276
Synchronous Serial Interface (SSI) ................................................................................ 310
Block Diagram ........................................................................................................................ 310
Functional Description ............................................................................................................. 310
Initialization and Configuration ................................................................................................. 319
Register Map .......................................................................................................................... 320
Register Descriptions .............................................................................................................. 321
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 347
2
C) Interface ............................................................................ 347
Preliminary
LM3S6610 Microcontroller
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