LM3S1512 Luminary Micro, Inc, LM3S1512 Datasheet - Page 8

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LM3S1512

Manufacturer Part Number
LM3S1512
Description
Lm3s1512 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Table of Contents
List of Figures
Figure 1-1.
Figure 2-1.
Figure 2-2.
Figure 5-1.
Figure 5-2.
Figure 5-3.
Figure 5-4.
Figure 5-5.
Figure 6-1.
Figure 6-2.
Figure 6-3.
Figure 7-1.
Figure 7-2.
Figure 7-3.
Figure 8-1.
Figure 9-1.
Figure 9-2.
Figure 9-3.
Figure 10-1.
Figure 10-2.
Figure 10-3.
Figure 10-4.
Figure 11-1.
Figure 12-1.
Figure 12-2.
Figure 12-3.
Figure 12-4.
Figure 12-5.
Figure 13-1.
Figure 13-2.
Figure 13-3.
Figure 14-1.
Figure 14-2.
Figure 14-3.
Figure 14-4.
Figure 14-5.
Figure 14-6.
Figure 14-7.
Figure 14-8.
Figure 14-9.
Figure 14-10. MICROWIRE Frame Format (Single Frame) .................................................................... 347
Figure 14-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 348
Figure 14-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 348
Figure 15-1.
Figure 15-2.
8
Stellaris
CPU Block Diagram ......................................................................................................... 37
TPIU Block Diagram ........................................................................................................ 38
JTAG Module Block Diagram ............................................................................................ 48
Test Access Port State Machine ....................................................................................... 51
IDCODE Register Format ................................................................................................. 56
BYPASS Register Format ................................................................................................ 57
Boundary Scan Register Format ....................................................................................... 57
External Circuitry to Extend Reset .................................................................................... 59
Power Architecture .......................................................................................................... 61
Main Clock Tree .............................................................................................................. 63
Hibernation Module Block Diagram ................................................................................. 121
Clock Source Using Crystal ............................................................................................ 122
Clock Source Using Dedicated Oscillator ......................................................................... 123
Flash Block Diagram ...................................................................................................... 140
GPIO Port Block Diagram ............................................................................................... 165
GPIODATA Write Example ............................................................................................. 166
GPIODATA Read Example ............................................................................................. 166
GPTM Module Block Diagram ........................................................................................ 207
16-Bit Input Edge Count Mode Example .......................................................................... 211
16-Bit Input Edge Time Mode Example ........................................................................... 212
16-Bit PWM Mode Example ............................................................................................ 213
WDT Module Block Diagram .......................................................................................... 242
ADC Module Block Diagram ........................................................................................... 266
Differential Sampling Range, V
Differential Sampling Range, V
Differential Sampling Range, V
Internal Temperature Sensor Characteristic ..................................................................... 270
UART Module Block Diagram ......................................................................................... 299
UART Character Frame ................................................................................................. 300
IrDA Data Modulation ..................................................................................................... 302
SSI Module Block Diagram ............................................................................................. 339
TI Synchronous Serial Frame Format (Single Transfer) .................................................... 342
TI Synchronous Serial Frame Format (Continuous Transfer) ............................................ 342
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 ...................................... 343
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .............................. 343
Freescale SPI Frame Format with SPO=0 and SPH=1 ..................................................... 344
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ........................... 345
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 .................... 345
Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 346
I
I
2
2
C Block Diagram ......................................................................................................... 376
C Bus Configuration .................................................................................................... 377
®
1000 Series High-Level Block Diagram ............................................................... 29
IN_ODD
IN_ODD
IN_ODD
Preliminary
= 1.5 V .................................................................. 269
= 0.75 V ................................................................ 269
= 2.25 V ................................................................ 270
July 25, 2008

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