SN74LS75 Motorola, SN74LS75 Datasheet - Page 4

• Manufacturer Part Number: SN74LS75
• Description: 4-BIT D LATCH LOW POWER SCHOTTKY
• Manufacturer: Motorola

GUARANTEED OPERATING RANGES
AC SETUP REQUIREMENTS
DEFINITION OF TERMS
SETUP TIME (t s ) — is defined as the minimum time required for the correct logic level to be present at the logic input prior to the
clock transition from HIGH-to-LOW in order to be recognized and transferred to the outputs.
HOLD TIME (t h ) — is defined as the minimum time following the clock transition from HIGH-to-LOW that the logic level must be
maintained at the input in order to ensure continued recognition. A negative HOLD TIME indicates that the correct logic level may
be released prior to the clock transition from HIGH-to-LOW and still be recognized.
S
Symbol
V CC
T A
I OH
I OL
t W
t s
t h
Symbol
b l
Enable Pulse Width High
Setup Time
Hold Time
Supply Voltage
Operating Ambient Temperature Range
Output Current — High
Output Current — Low
P
Parameter
ENABLE
DATA
(T A = 25 C, V CC = 5.0 V)
TO OTHER LATCH
Q
Q
D
E
Parameter
SN54/74LS75
1.3 V
t PLH
t PHL
t PLH
t PHL
1.3 V
t s
FAST AND LS TTL DATA
1.3 V
1.3 V
Min
20
20
0
LOGIC DIAGRAM
AC WAVEFORMS
1.3 V
5-4
Limits
1.3 V
D
Typ
t h
SN54/74LS77
t PHL
t PLH
54, 74
54
74
54
74
54
74
t PHL
t PLH
1.3 V
Max
Q (SN54/74LS75 ONLY)
Q
1.3 V
1.3 V
4.75
– 55
Min
4.5
0
U i
Unit
ns
ns
ns
Typ
5.0
5.0
25
25
T
Test Conditions
V
V CC = 5.0 V
C
– 0.4
Max
5.25
125
5.5
4.0
8.0
70
di i
5 0 V
Unit
mA
mA
V
C