ADP3211 ON Semiconductor, ADP3211 Datasheet - Page 13

• Manufacturer Part Number: ADP3211
• Description: 7-bit, Programmable, Single-phase, Synchronous Buck Controller
• Manufacturer: ON Semiconductor

Setting Switch Frequency
Master Clock Frequency in PWM Mode
is set by an external resistor connected from the RT pin to
GND. The frequency varies with the VID voltage: the
lower the VID voltage, the lower the clock frequency. The
variation of clock frequency with VID voltage maintains
constant V
efficiency at lower VID voltages.
Switching Frequency in RPM Mode
frequency is controlled by the ripple voltage on the COMP
pin. Each time the COMP pin voltage exceeds the RPM pin
voltage threshold level determined by the VID voltage and
the external resistor connected between RPM and ground,
an internal ramp signal is started and DRVH is driven high.
The slew rate of the internal ramp is programmed by the
current entering the RAMP pin. One−third of the RAMP
current charges an internal ramp capacitor (5 pF typical)
and creates a ramp. When the internal ramp signal
intercepts the COMP voltage, the DRVH pin is reset low.
RPM operation is almost constant. While in discontinuous
current conduction mode, the switching frequency is
reduced as a function of the load current.
VCC
When the ADP3211 runs in PWM, the clock frequency
When the ADP3211 operates in RPM mode, its switching
In continuous current mode, the switching frequency of
RAMP
I
R
CCGFX
= A
C
R
R
X I
RAMP
ripple and improves power conversion
A
D
OSCILLATOR
COMP
CLOCK
0.2 V
R
A
C
FB
C
FB
A
Figure 20. PWM Mode Operation
C
+
R
+
VDC
FBRTN
B
B
V
FLIP−FLOP
CS
S
http://onsemi.com
RD
Q
13
–
+
LLINE
IN
Differential Sensing of Output Voltage
accuracy VID DAC, referenced by a precision band gap
source and a low offset error amplifier, to meet the rigorous
accuracy requirement of the Intel IMVP−6.5 specification.
In steady−state mode, the combination of the VID DAC
and error amplifier maintain the output voltage for a
worst−case scenario within ±7 mV of the full operating
output voltage and temperature range.
and FBRTN pins. FB should be connected through a
resistor to the positive regulation point, the V
sensing pin of the GMCH or CPU. FBRTN should be
connected directly to the negative remote sensing point, the
V
DAC and precision voltage reference are referenced to
FBRTN and have a typical current of 70 mA for guaranteed
accurate remote sensing.
Output Current Sensing
amplifier (CSA) to monitor the total output current of the
converter for proper voltage positioning vs. load current
and for overcurrent detection. Sensing the current
delivered to the load is an inherently more accurate method
than detecting peak current or sampling the current across
DRIVER
SS
DRVH
GATE
DRVL
The ADP3211 combines differential sensing with a high
The V
The ADP3211 includes a dedicated current sense
BST
SW
sensing point of the GMCH or CPU. The internal VID
CSFB
5.0 V
CCGFX
CSREF
DRVH1
DRVL1
R
BST1
SW1
CS
C
CS
output voltage is sensed between the FB
CSSUM
VCC
R
PH
R
I
L
LOAD
CC
remote