AD8325-EVAL Analog Devices, AD8325-EVAL Datasheet - Page 3

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AD8325-EVAL

Manufacturer Part Number
AD8325-EVAL
Description
5 V CATV Line Driver Fine Step Output Power Control
Manufacturer
Analog Devices
Datasheet
LOGIC INPUTS (TTL/CMOS-Compatible Logic)
Parameter
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current (V
Logic “0” Current (V
Logic “1” Current (V
Logic “0” Current (V
Logic “1” Current (V
Logic “0” Current (V
TIMING REQUIREMENTS
Parameter
Clock Pulsewidth (T
Clock Period (T
Setup Time SDATA vs. Clock (T
Setup Time DATEN vs. Clock (T
Hold Time SDATA vs. Clock (T
Hold Time DATEN vs. Clock (T
Input Rise and Fall Times, SDATA, DATEN, Clock (T
C
)
WH
INH
INL
INH
INL
INH
INL
)
= 0 V) CLK, SDATA, DATEN
= 0 V) TXEN
= 0 V) SLEEP
= 5 V) CLK, SDATA, DATEN
= 5 V) TXEN
= 5 V) SLEEP
ANALOG
OUTPUT
SDATA
DATEN
TXEN
DH
EH
CLK
DS
ES
)
)
)
)
SDATA
(Full Temperature Range, V
SIGNAL AMPLITUDE (p-p)
CLK
MSB
T
DS
T
ES
VALID DATA WORD G1
MSB. . . .LSB
8 CLOCK
CYCLES
T
WH
T
C
T
R
DS
, T
T
VALID DATA BIT
EH
F
)
MSB-1
GAIN TRANSFER (G1)
CC
T
GS
= 5 V, T
(DATEN, CLK, SDATA, TXEN, SLEEP, V
T
DH
R
T
50
Min
2.1
0
0
–600
–250
50
–250
Min
16.0
32.0
5.0
15.0
5.0
3.0
= T
OFF
VALID DATA WORD G2
F
= 4 ns, f
CLK
GAIN TRANSFER (G2)
MSB-2
= 8 MHz unless otherwise noted.)
Typ
Typ
T
ON
CC
= 5 V: Full Temperature Range)
Max
5.0
0.8
20
–100
190
–30
190
–30
Max
10
AD8325
Unit
V
V
nA
nA
µA
µA
µA
µA
Unit
ns
ns
ns
ns
ns
ns
ns

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