AD8325-EVAL Analog Devices, AD8325-EVAL Datasheet

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AD8325-EVAL

Manufacturer Part Number
AD8325-EVAL
Description
5 V CATV Line Driver Fine Step Output Power Control
Manufacturer
Analog Devices
Datasheet
a
GENERAL DESCRIPTION
The AD8325 is a low-cost, digitally controlled, variable gain ampli-
fier optimized for coaxial line driving applications such as cable
modems that are designed to the MCNS-DOCSIS upstream
standard. An 8-bit serial word determines the desired output gain
over a 59.45 dB range resulting in gain changes of 0.7526 dB/LSB.
The AD8325 comprises a digitally controlled variable attenuator
of 0 dB to –59.45 dB, which is preceded by a low noise, fixed
gain buffer and is followed by a low distortion high power ampli-
fier. The AD8325 accepts a differential or single-ended input
signal. The output is specified for driving a 75 Ω load, such as
coaxial cable.
Distortion performance of –57 dBc is achieved with an output
level up to 61 dBmV at 21 MHz bandwidth. A key performance
and cost advantage of the AD8325 results from the ability to
maintain a constant 75 Ω output impedance during Transmit
Enable and Transmit Disable conditions. In addition, this
device has a sleep mode function that reduces the quiescent
current to 4 mA.
The AD8325 is packaged in a low-cost 28-lead TSSOP, operates
from a single 5 V supply, and has an operational temperature
range of –40°C to +85°C.
V
V
IN+
IN–
5 V CATV Line Driver Fine Step
Z
Z
IN
IN
(SINGLE) = 800
(DIFF) = 1.6k
–50
–52
–54
–56
–58
–60
–62
–64
DIFF OR
SINGLE
INPUT
AMP
5
R1
R2
FUNCTIONAL BLOCK DIAGRAM
V
DATEN
OUT
@ MAX GAIN
V
CC
15
= 61dBmV
(7 PINS)
Output Power Control
VERNIER
FUNDAMENTAL FREQUENCY – MHz
DATA
25
CLK
V
V
OUT
@ MAX GAIN
OUT
@ MAX GAIN
AD8325
ATTENUATION
DATA LATCH
GND (11 PINS) TXEN
= 59dBmV
REGISTER
= 62dBmV
35
DECODE
CORE
SHIFT
8
8
8
45
BYP
POWER-DOWN
V
AD8325
OUT
@ MAX GAIN
POWER
AMP
LOGIC
= 60dBmV
55
Z
OUT
SLEEP
75
DIFF =
65
V
V
OUT+
OUT–

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AD8325-EVAL Summary of contents

Page 1

... Distortion performance of –57 dBc is achieved with an output level dBmV at 21 MHz bandwidth. A key performance and cost advantage of the AD8325 results from the ability to maintain a constant 75 Ω output impedance during Transmit Enable and Transmit Disable conditions. In addition, this device has a sleep mode function that reduces the quiescent current ...

Page 2

... AD8325–SPECIFICATIONS 1 a 1:1 transformer with an insertion loss of 0 MHz unless otherwise noted.) Parameter INPUT CHARACTERISTICS Specified AC Voltage Noise Figure Input Resistance Input Capacitance GAIN CONTROL INTERFACE Gain Range Maximum Gain Minimum Gain Gain Scaling Factor OUTPUT CHARACTERISTICS Bandwidth (–3 dB) Bandwidth Roll-Off ...

Page 3

... CLOCK CYCLES GAIN TRANSFER (G1) T OFF T GS VALID DATA BIT MSB MSB AD8325 = 5 V: Full Temperature Range) CC Typ Max Unit 5 –100 nA µA 190 µA –30 µA 190 µA – MHz unless otherwise noted.) ...

Page 4

... AD8325ARU –40°C to +85°C AD8325ARU-REEL –40°C to +85°C AD8325-EVAL Thermal Resistance measured on SEMI standard 4-layer board. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8325 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges ...

Page 5

... GAIN CONTROL – Decimal 40 79D 46D 0 23D –10 –20 00D –30 –40 –50 0 100 FREQUENCY – MHz Typical Performance Characteristics–AD8325 61dBmV OUT @ MAX GAIN – 10MHz TXEN = 1 –34 –38 –42 –46 – ...

Page 6

... AD8325 – 62dBmV @ MAX GAIN –60 OUT V = 61dBmV @ MAX GAIN OUT – 60dBmV @ MAX GAIN OUT – 59dBmV @ MAX GAIN OUT – FUNDAMENTAL FREQUENCY – MHz – 62dBmV @ MAX GAIN OUT – 61dBmV @ MAX GAIN OUT –54 –56 –58 – ...

Page 7

... The serial interface timing for the AD8325 is shown in Figures 2 and 3. The programmable gain range of the AD8325 is –29. +30 dB and scales 0.7526 dB per least significant bit (LSB). Because the AD8325 was characterized with a transformer, the stated gain values already take into account the losses associated with the transformer ...

Page 8

... Logic enabling forward signal transmission at the desired gain level. Between Burst Operation The asynchronous TXEN pin is used to place the AD8325 into “Between Burst” mode while maintaining a differential output impedance of 75 Ω. Applying a Logic 0 to the TXEN pin acti- vates the on-chip reverse amplifier, providing a 74% reduction in consumed power ...

Page 9

... SYM/SECOND or –68 dBmV. Evaluation Board Features and Operation The AD8325 evaluation board (Part # AD8325-EVAL) and control software can be used to control the AD8325 upstream cable driver via the parallel port of a PC. A standard printer cable connected between the parallel port and the evaluation ...

Page 10

... AD8325 Differential Inputs The AD8325-EVAL evaluation board may be driven with a differential signal in one of two ways. A transformer may be used to convert a single-ended signal to differential differ- ential signal source may be used. Figure 7 and the following paragraphs describe each of these methods. Single-Ended-to-Differential Input (Figure 7, Option 1) A TOKO 617DB-A0070 1:1 transformer is preinstalled in the T3 location of the evaluation board. Install 0 Ω ...

Page 11

... EVALUATION BOARD FEATURES AND OPERATION AD8325 ...

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... AD8325 ...

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... AD8325 ...

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... AD8325 ...

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... AD8325 ...

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... AD8325 AD8325 Evaluation Board Rev. B, Single-Ended-to-Differential Input – Revised – February 21, 2001 Qty. Description 10 µ ‘D’ size tantalum chip capacitor 1 1 1,000 1206 ceramic chip capacitor 0.1 µ 1206 size ceramic chip capacitor 2 0.1 µ 0603 size ceramic chip capacitor 8 0 Ω ...

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