MCP40D17 Microchip Technology Inc., MCP40D17 Datasheet - Page 38

• Manufacturer Part Number: MCP40D17
• Description: 7-bit Single I 2 C? With Command Code Digital Pot With Volatile Memory In Sc70
• Manufacturer: Microchip Technology Inc.

MCP40D17/18/19
5.4.1
The write operation requires the START condition,
Control
Acknowledge, Data Byte, Acknowledge and STOP (or
RESTART) condition. The Control (Slave Address)
Byte requires the R/W bit equal to a logic zero (R/W =
“0”) to generate a write sequence. The MCP40D17/
18/19 is responsible for generating the Acknowledge
(A) bits.
Data is written to the MCP40D17/18/19 after every byte
transfer (during the A bit). If a STOP or RESTART
condition is generated during a data transfer (before
the A bit), the data will not be written to MCP40D17/18/
19.
Data bytes may be written after each Acknowledge.
The command is terminated once a Stop (P) condition
occurs. Refer to
sequence and
write sequence. For a single byte write, the master
sends a STOP or RESTART condition after the 1st data
byte is sent.
The MSb of each Data Byte is a don’t care, since the
wiper register is only 7-bits wide.
The command is terminated once a Stop (P) or Restart
(S) condition occurs.
Figure 5-14
behavior of the Master Device and the MCP40D17/18/
19 device and the resultant I
FIGURE 5-12:
DS22152B-page 38
Note:
Legend
S
S = Start Condition
P = Stop Condition
A = Acknowledge
X = Don’t Care
R/W = Read/Write bit
D6:D0 = Data bits
Byte,
0 1 0
WRITE OPERATION
A command code with a non-zero value
will cause the data not to be written to the
wiper register
shows the I
Slave Address Byte
Figure 5-13
Fixed
Address
Figure 5-12
Acknowledge,
1
I
2
C Single Byte Write Command Format (Slave Address = “0101110”).
1
for the generic (multi-byte)
2
2
C write communication
1 0 0
C bus values.
for the single byte write
Command
A
Read/Write bit (“0” = Write)
0 0
Code,
Command Code
0 0
0
0
5.4.2
The read operation requires the START condition,
Control
Acknowledge,
Acknowledge, Data Byte, the master generating the
A and STOP (or RESTART) condition. The first Control
Byte requires the R/W bit equal to a logic zero (R/W =
“0”) to write the Command Code, while the second
Control Byte requires the R/W bit equal to a logic one
(R/W = “1”) to generate a read sequence. The
MCP40D17/18/19 will A the Slave Address Byte and A
all the Data Bytes. The I
Address Byte and the last Data Byte. If there are
multiple Data Bytes, the I
except the last Data Byte (which it will A).
The MCP40D17/18/19 maintains control of the SDA
signal until all data bits have been clocked out.
The command is terminated once a Stop (P) or Restart
(S) condition occurs. Refer to
command sequence. For a single read, the master
sends a STOP or RESTART condition after the 1st data
byte (and A bit) is sent from the slave.
Figure 5-16
behavior of the Master Device and the MCP40D17/18/
19 device and the resultant I
0 0
Note:
A
Byte,
READ OPERATIONS
A command code with a non-zero value
will cause the data not to be read from the
wiper register
X D6 D5 D4
shows the I
Restart
Acknowledge,
Data Byte
© 2009 Microchip Technology Inc.
2
C Master will A all Data Bytes
D3
2
Condition,
C Master will A the Slave
2
2
C read communication
C bus values.
D2 D1 D0 A
Figure 5-15
Command
Control
STOP bit
for the read
P
Code,
Byte,