UPA2751GR NEC, UPA2751GR Datasheet

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UPA2751GR

Manufacturer Part Number
UPA2751GR
Description
SWITCHING N- AND P-CHANNEL POWER MOS FET
Manufacturer
NEC
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPA2751GR
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Document No.
Date Published
Printed in Japan
ORDERING INFORMATION
ABSOLUTE MAXIMUM RATINGS (T
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
DESCRIPTION
Field Effect Transistor designed for DC/DC converters of
notebook computers and so on.
FEATURES
Notes 1. PW
Drain to Source Voltage (V
Gate to Source Voltage (V
Drain Current (DC)
Drain Current (pulse)
Total Power Dissipation (1 unit)
Total Power Dissipation (2 unit)
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Single Avalanche Current
Single Avalanche Energy
The
Asymmetric dual chip type
Low on-state resistance, Low C
CH1: R
CH2: R
Built-in G-S protection diode
Small and surface mount package (Power SOP8)
PART NUMBER
2. T
3. Starting T
PA2751GR is asymmetrical dual N-Channel MOS
C
C
PA2751GR
DS(on)2
iss
DS(on)2
iss
device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage
may be applied to this device.
G15781EJ1V0DS00 (1st edition)
March 2002 NS CP(K)
A
= 1040 pF TYP. (V
= 480 pF TYP. (V
= 25°C, Mounted on ceramic substrate of 2000 mm
: 21.0 m
: 35.0 m
10 s, Duty cycle
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
ch
Note1
= 25°C, V
MAX. (V
MAX. (V
Note3
Note3
Note3
Note3
DS
GS
= 0 V)
DS
= 0 V)
DS
DD
= 10 V, V
Note2
Note2
= 10 V, V
iss
GS
GS
Power SOP8
= 15 V, R
PACKAGE
1%
= 4.5 V, I
= 4.5 V, I
N-CHANNEL POWER MOS FET
A
GS
GS
= 25°C, All terminals are connected.)
= 0 V)
G
= 0 V)
D
D
= 25
= 4.5 A)
= 4.0 A)
DATA SHEET
SWITCHING
CH1/CH2
CH1/CH2
CH1/CH2
CH1/CH2
CH1/CH2
CH1/CH2
, V
CH1
CH2
CH1
CH2
CH1
CH1
CH2
CH2
GS
MOS FIELD EFFECT TRANSISTOR
= 20
I
I
2
I
I
D(pulse)
D(pulse)
V
V
D(DC)
D(DC)
T
E
E
T
I
I
x 1.6 mm
P
P
GSS
0 V
DSS
AS
AS
stg
AS
AS
ch
T
T
–55 to + 150
CH2
8
1
PACKAGE DRAWING (Unit: mm)
5.37 Max.
±9.0
±8.0
±20
±36
±32
150
1.7
2.0
9.0
8.1
8.0
6.4
30
0.40
1.27
CH1
+0.10
–0.05
0.78 Max.
5
4
PA2751GR
mJ
mJ
°C
°C
W
W
V
V
A
A
A
A
A
A
0.12 M
EQUIVALENT CIRCUIT
Gate
Gate
Protection
Diode
CH2
CH1
©
0.5 ±0.2
6.0 ±0.3
(1/2 circuit)
4.4
1
2
7, 8
3
4
5, 6
; Source 1
; Gate 1
; Drain 1
; Source 2
; Gate 2
; Drain 2
Source
Drain
2001
0.8
Body
Diode
0.10

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UPA2751GR Summary of contents

Page 1

... Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version ...

Page 2

... DSS Starting T TEST CIRCUIT 3 GATE CHARGE D.U. PG 25°C, All terminals are connected.) A SYMBOL TEST CONDITIONS DSS ± GSS GS(off ...

Page 3

... DSS Starting T TEST CIRCUIT 3 GATE CHARGE D.U. PG 25°C, All terminals are connected.) A SYMBOL TEST CONDITIONS DSS ± GSS GS(off ...

Page 4

TYPICAL CHARACTERISTICS ( CH1 FORWARD TRANSFER CHARACTERISTICS 100 Pulsed 25˚C A 0.1 0. Gate to Source Voltage - V GS FORWARD TRANSFER ADMITTANCE ...

Page 5

A) CH1 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 40 Pulsed 100 T - Channel Temperature - ...

Page 6

A) CH1 DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 120 100 100 120 140 160 T - Ambient Temperature - ˚C A FORWARD BIAS SAFE OPERATING AREA 100 I ...

Page 7

A) CH1 SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD 100 Starting 8 100 1 m ...

Page 8

TYPICAL CHARACTERISTICS (TA = 25°C) B) CH2 FORWARD TRANSFER CHARACTERISTICS 100 Pulsed 25˚C A 0.1 0. Gate to Source Voltage - V GS FORWARD TRANSFER ...

Page 9

B) CH2 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 50 Pulsed 100 125 T - Channel Temperature - ...

Page 10

B) CH2 DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 120 100 100 120 140 160 T - Ambient Temperature - ˚C A FORWARD BIAS SAFE OPERATING AREA 100 I ...

Page 11

B) CH2 SINGLE AVALANCHE ENERGY vs. INDUCTIVE LOAD 100 Starting 6 100 1 m ...

Page 12

... NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others ...

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