EM6520 EM Microelectronic, EM6520 Datasheet - Page 33

• Manufacturer Part Number: EM6520
• Description: MFP version of EM6620 Ultra Low Power Microcontroller 4x8 LCD Driver
• Manufacturer: EM Microelectronic

10 Supply Voltage Level Detector
The EM6520 has a built-in Supply Voltage Level Detector (SVLD), such that the CPU can compare the supply
voltage against a pre-selected value. During Sleep Mode this function is inhibited.
The CPU activates the supply voltage level
detector by writing VldStart =1 in the register
RegVldCntl . The actual measurement starts on
the next ck[9] rising edge and lasts during the
ck[9] high period (2ms at 32kHz). The busy flag
VldBusy stays high from VldStart set until the
measurement is finished. The worst case time
until the result is available is 1.5 ck[9] prescaler
clock periods (32kHz -> 6ms).
During the actual measurement the device will
draw an additional 5uA of I
end of the measure an interrupt request
IRQVLD is generated and the result is available
by inspection of the bit VLDResult . If the result
is read 0, then the power supply voltage was
greater than the detection level value. If read 1,
the power supply voltage was lower than the detection level value. During each read while Busy=1 the
VLDResult is not guaranteed.
10.1 SVLD Register
Table 10.1.1 register RegVldCntl
Copyright  2002, EM Microelectronic-Marin SA
The SVLD and the PB0 Input Comparator are using the same internal measurement block. Therefore
Bit
3
2
2
1
0
R*; VLDResult is not guaranteed while VLDBusy=1
NoLogicWD
VLDResult
NoOscWD
VLDBusy
VLDStart
Name
only one of the two functions can be activated at the same time.
VDD
current. After the
Reset
0
0
0
0
0
Figure 23. SVLD Timing Diagram
compare level
ck[9] (256Hz)
VBAT =VDD
R/W
R/W
R/W
Read Result
R*
W
R
Busy Flag
measure
Result
33
CPU starts
measure
SVLD <VBAT
No Oscillator watchdog
No logic watchdog
0
VLD result flag
VLD busy flag
Description
VLD start
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CPU starts
measure
SVLD >VBAT
EM6520
03/02 REV. D/449
1