FDC37B77X SMSC Corporation, FDC37B77X Datasheet - Page 137

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FDC37B77X

Manufacturer Part Number
FDC37B77X
Description
ENHANCED SUPER I/O CONTROLLER WITH WAKE UP FEATURES
Manufacturer
SMSC Corporation
Datasheet
Index Address
Default = 0x03
on Vcc POR or
Reset_Drv
Logical Device #
Default = 0x00
on Vcc POR or
Reset_Drv
Card Level
Reserved
Device ID
Hard wired
= 0x43
Device Rev
Hard wired
= Current Revision
REGISTER
0x08 - 0x1F Reserved - Writes are ignored, reads return 0.
0x04 - 0x06 Reserved - Writes are ignored, reads return 0.
ADDRESS
0x03 R/W
0x07 R/W
0x20 R
0x21 R
Table 53 - Chip Level Registers
Chip Level, SMSC Defined
Bit[7]
= 1
= 0
Bits [6:2]
Reserved - Writes are ignored, reads return 0.
Bits[1:0]
Sets GP index register address when in Run mode
(not in Configuration Mode).
= 11
= 10
= 01
= 00
A write to this register selects the current logical
device.
configuration registers for each logical device.
Note: The Activate command operates only on the
selected logical device.
A read only register which provides device
identification. Bits[7:0] = 0x43 when read.
A read only register which provides device revision
information. Bits[7:0] = current revision when read.
0xEA (Default)
0xE4
0xE2
0xE0
Enable WDT_CTRL and SMI Enable and
SMI Status Register access when not in
configuration mode
Disable WDT_CTRL and SMI Enable and
SMI Status Register access when not in
configuration mode (Default)
This allows access to the control and
137
DESCRIPTION
STATE
C
C
C

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