AN2414 Freescale Semiconductor / Motorola, AN2414 Datasheet - Page 9

• Manufacturer Part Number: AN2414
• Description: CMOS Signal Interface (CSI) Module Supplementary Information for MC9328MX1 and MC9328MXL Application Note
• Manufacturer: Freescale Semiconductor / Motorola

5.1 Live Veiw Resolution Mode (LVRM)
The image is divided into square blocks, according to the choice made on the Live View Resolution Mode
(LVRM). Statistic data is generated per each block. The output includes 4 16-bit numbers:
Sum of Red
Sum of Blue
Sume of Green
SOAD of Green
Each of the sum and SOAD data are pre-divided by a divisor.
For DRM = 0, divisor = 4.
For DRM = 1, divisor = 2.
Data is packed into 32-bit words before putting into the STAT FIFO. The endian is selectable by user setting
BIG_ENDIAN bit in the CSI control register 1.
5.2 Skip Count Enable (SCE)
In order to support a variety of image resolutions, the LVRM can be set together with a line skipping scheme,
either in horizontal (HSC) or vertical (VSC) direction. Skipping can be enabled or disabled. When it is
enabled, lines between adjacent blocks are ignored, virtually supporting an image size larger than that of the
current LVRM.
Taken 640x480 (VGA size) as an example, the method to calculate HSC & VSC is:
MOTOROLA
1. Choose the smaller closest LVRM
2. Divide image height & width by the no. of statistical blocks
3. Subtract the statistic block size from the above
4. Offset the above numbers by 1 giving the HSC & VSC
=> LVRM Mode 0 = 512 x 384 (8 x 6 blocks)
=> Horizontal : 640 / 8 = 80
=> Vertical : 480 / 6 = 80
=> Horizontal : 80 - 64 = 16
=> Vertical : 80 - 64 = 16
=> HSC : 16 - 1 = 15
=> VSC : 16 - 1 = 15
Freescale Semiconductor, Inc.
For More Information On This Product,
MC9328MX1/MXL Application Note
Engineering Draft / Preliminary
Go to: www.freescale.com
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