AN2316 Freescale Semiconductor / Motorola, AN2316 Datasheet - Page 2

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AN2316

Manufacturer Part Number
AN2316
Description
Connecting an MSC8102 TDM to a Time-Slot Interchange Switching Device
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Configuring the MSC8102 TDM
1.1 Configuring the MSC8102 TDM
2
SYNC
Data
TDM0RSYN
Note: TDM0RCLK,TDM0RSYN,TDM0TDATA, and TDM0RDAT ports function as data links.
The E1 frame is delimited by the switching (TSI) synchronization signal (
of the first time slot in the frame and by a clock (
split into multiple time slots, each designated for a different logical channel. Figure 2 illustrates an E1
frame, consisting of thirty-two 8-bit logical channels.
TDM0TSYN
TDM0RCLK
The overall steps in initializing an MSC8102 TDM are as follows:
1. Initialize the configuration registers to define the basic interface between the external device and the
2. Initialize the channel parameter registers to determine the channel type (A-law, µ− law, or transparent)
3. Initialize the control registers.
4. Clear the event registers (TDMxRER, TDMxTER).
5. Configure the external interface:
This section presents the register settings to complete these steps. For the example presented here,
TDM0RDAT
TDM0TCLK
TDM0TDAT
MSC8102 TDM.
and the buffer location of each channel.
The channel parameter register values can change during TDM operation.
a. Set up the parallel I/O pins.
b. Enable the TDM.
Channel 0
Freescale Semiconductor, Inc.
For More Information On This Product,
Bit 7
Bit 7
Bit 7
Bit 7
Figure 2. E1 Data Frame
Go to: www.freescale.com
Channel 1
Bit 6
Bit 6
Bit 6
Bit 6
Bit 5
Bit 5
Bit 5
Bit 5
32 Channels
Channel 2
GPCLK3
Bit 4
Bit 4
Bit 4
Bit 4
) that controls the data bit rate.The E1 frame is
Bit 3
Bit 3
Bit 3
Bit 3
Bit 2
Bit 2
Bit 2
Bit 2
GPCLK2
Channel 31
) that marks the start
Bit 1
Bit 1
Bit 1
Bit 1
Bit 0
Bit 0
Bit 0
Bit 0
Channel 0

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