CY2DP3110 Cypress Semiconductor, CY2DP3110 Datasheet
CY2DP3110
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CY2DP3110 Summary of contents
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... The device features two differential input paths that are multi- plexed internally. This mux is controlled by the CLK_SEL pin. The CY2DP3110 may function not only as a differential clock buffer but also as a signal-level translator and fanout on HSTL single-ended signal to 10 ECL/PECL differential loads. An ex- ternal bias pin, VBB, is provided for this purpose ...
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... CLKB, CLKB# input pair is active. CLKB can be driven with HSTL compatible signals with respective power configurations Governing Agencies The following agencies provide specifications that apply to the CY2DP3110. The agency name and relevant specification is listed below in Table 2. Table 2. Agency Name JEDEC JESD 020B (MSL) ...
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... V (AC) impacts the device propagation delay, device and part-to-part skew. Refer to Fig DIF =(V -V )/50; I =(V -V OHMIN OHMIN TT OHMAX OHMAX TT CC FastEdge™ Series CY2DP3110 Min. Max. –0.3 4.6 -4.6 0.3 –65 +150 150 2000 3 50 Min. Max. |200| 100 –40 ...
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... MHz , See Figure 3 [13] 660 MHz [14] [13] 660 MHz [13] 660 MHz , See Figure 3 660 MHz 50% duty cycle Differential 20% to 80% – PLH PHL FastEdge™ Series CY2DP3110 Min. Max. Unit –2.625 –2.375 V –3.465 –3.135 –1.25 –0.7 V – ...
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... Figure 3. ECL/LVPECL Output output pulse skew (|t PD PLH FastEdge™ Series CY2DP3110 ...
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... Figure 5. CY2DP3110 AC Test Reference " Figure 7. Driving a PECL/ECL Single-ended Input FastEdge™ ...
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... Y Z One output is shown for clarity and supplies. Package Type 32-pin TQFP 32-pin TQFP – Tape and Reel FastEdge™ Series CY2DP3110 ...
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... Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. Cypress products are not warranted nor intended to be used for medical, life-support, life-saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. FastEdge™ Series CY2DP3110 Dimensions in mm 51-85088-*B ...
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... Document History Page Document Title: CY2DP3110 FastEdge™ Series 1 of 2:10 Differential Clock/Data Fanout Buffer Document Number: 38-07469 REV. ECN NO. Issue Date ** 121284 11/12/02 *A 126251 04/15/03 *B 127696 06/12/03 *C 128731 08/04/03 *D 130299 11/19/03 *E 227708 See ECN *F 229393 See ECN *G 247626 See ECN Document #: 38-07469 Rev.*G Orig. of Change RGL ...