AN2283 Freescale Semiconductor / Motorola, AN2283 Datasheet - Page 35

• Manufacturer Part Number: AN2283
• Description: Scalable Controller Area Network (MSCAN)
• Manufacturer: Freescale Semiconductor / Motorola

MOTOROLA
WARNING/ERROR
NO
TEC = 0 AND REC = 0 AFTER 128 OCCURRENCES OF 11 CONSECUTIVE RECESSIVE [1] BITS ARE MONITORED
96 <= TEC <128
TEC < 96
Motorola Scalable Controller Area Network (MSCAN) Interrupts
The TEC dictates what state the node is in according to the number of transmit
errors observed. Out of reset, the TEC is initialized to 0 by the MSCAN. At this
time, the node will be in the No Warning/Error (Error Active) State. When
96 <= TEC < 128 then the node is Error Active and in the Transmitter Warning
State. When 128 <= TEC <= 255 the node is error passive and in the
Transmitter Error Passive State. When TEC > 255 the node enters the bus off
state and does not transmit messages onto the bus until 128 occurrences of 11
consecutive recessive [1] bits are monitored on the bus. At which time, both the
REC and TEC are reset to 0 thus entering the No Warning/Error State.
The rules TEC follows to adjust its values are:
1. Bit Stuffing Rule: When five consecutive bits of equal value are transmitted, an extra bit of the
opposite value is automatically inserted into the bit stream which provides edges for clock
resynchronization. Then, the receivers automatically de-stuff this extra bit.
Figure 25. Transmitter Error Polling Method
1. When a node detects a transmit error condition the transmitter sends an
2. When an Error Active node’s transmitter detects a Bit Error while
3. When an Error Active node detects an error condition it signals it by
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error flag to notify the MSCAN’s bus and the Transmit Error Count is
increased by eight.
sending an Active Error Flag or an Overload Flag, the Transmit Error
Count is increased by eight.
transmitting an Active Error Flag. As mentioned before the Active Error
Flag consists of six consecutive dominant bits. The Error Flag’s Form
violates the Bit Stuffing rule
an error condition and so each start to transmit an error flag. So, the
sequence of dominant bits which actually can be monitored on the bus
result from a superposition of different error flags transmitted by
individual nodes. So, any node can tolerate up to seven consecutive
dominant [0] bits after sending an error flag. After detecting the 8
TRANSMITTER
WARNING
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128 <= TEC <= 255
(1)
ERROR PASSIVE
TRANSMITTER
. As a consequence, all other nodes detect
TEC > 255
Error Interrupts Overview
BUS OFF
AN2283/D
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