AN2283 Freescale Semiconductor / Motorola, AN2283 Datasheet - Page 27

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AN2283

Manufacturer Part Number
AN2283
Description
Scalable Controller Area Network (MSCAN)
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Error Interrupts Overview
MOTOROLA
NOTE:
Motorola Scalable Controller Area Network (MSCAN) Interrupts
Both of these counters range from 0 to 255 and the hardware on the nodes
update the count accordingly.
Each node can be in one of three error states:
Receive errors cannot place the node into BUS OFF state. This keeps a lone
node from going bus off due to lack of ACK symbols to attempted
transmissions.
Error Interrupts are used to monitor the number of errors within a particular
node and how they are affecting the communication between that node and
other nodes in the system. The error counts are determined by the node’s
Transmit Error Counter (TEC) and Receive Error Counter (REC), which are
controlled by the MSCAN. These counters dictate what states the nodes are in.
As shown in
depending on the counters REC and TEC. The initial state is the No
Warning/Error State when TEC and REC = 0. These states are:
1. No Warning/Error State
2. Receiver/Transmitter Warning State
3. Receiver/Transmitter Error Passive State
4. Bus Off State
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Error Active State
Error Passive State
Bus Off State
A node is error active when TEC < 128 AND REC < 128.
Sends an Active Error Flag when an error is detected.
A node is passive error when 128 <= TEC <= 255 OR REC >= 128.
Sends a Passive Error Flag when an error is detected. When a
message is to be transmitted the node must wait for an additional
amount of bus idle time (8 bit times) before transmission can begin.
A node is bus off when TEC > 255.
Not allowed to participate in bus communication (the output drivers
are switched off), but permitted to become error active with both TEC
and REC reset to 0 after 128 occurrences of 11 consecutive
recessive [1] bits have been monitored on the bus. A minimum of 11
consecutive recessive [1] bits occur between messages
(Acknowledgement Delimiter, End of Frame, and Intermission).
Figure
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Normal State/Initial State — TEC = REC = 0
20, there are a total of four states a node can enter
Error Interrupts Overview
AN2283/D
27

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