AN2262 Motorola / Freescale Semiconductor, AN2262 Datasheet - Page 28
![no-image](/images/no-image-200.jpg)
AN2262
Manufacturer Part Number
AN2262
Description
Wireless HC08 Modem
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.AN2262.pdf
(108 pages)
- Current page: 28 of 108
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AN2262/D
SPI Data Format
SPI Framing
28
CAPTURE STROBE
FOR REFERENCE
SPSCK; CPOL = 0
SPSCK; CPOL =1
NOTE:
SPSCK CYCLE #
FROM MASTER
SS
FROM SLAVE
;
TO SLAVE
MOSI
MISO
The differentiation between these two modes is driven by the MCU. The input
RESETB pin of MC33591/3 tells it whether the receiver is being configured
(and its SPI is in slave mode) or if it should work in normal mode (its SPI is in
master mode). RESETB is connected to the general-purpose I/O pin of the
MCU in output mode.
The switching of SPI operation on MCU side is done by software.
The SPI direction is normally driven by a dedicated hardware pin (in
MC68HC908GP32 it is the SPI SS pin). This pin is an input that in multiple-
slave systems selects the unique slave. Since this feature is not supported, the
SS pin is tied low on the board and the SPI is configured so that it ignores this
pin.
The SPI peripheral may operate in several modes and data/clock polarities.
Data coming from MC33591/3 are valid at the falling clock edge. When no data
are output, SCLK and MOSI force a low level. Using Motorola acronyms, this
means that the clock phase and polarity control bits of the microcontroller SPI
have to be CPOL = 0 and CPHA = 1.
The process of receiving data is also driven by an interrupt. Here the SPI
receiver interrupt is generated after a complete byte is received through the
SPI. There is no information available about the start of the frame. Another
method has to be used to detect when the frame starts.
When no reception is in progress, there is also no activity on the SPI. Thus, the
first received byte is the start of the frame and the correct end of the frame must
be detected instead. This is effectively accomplished by simple timeout
method. On every SPI receive interrupt the timeout is reset. If within this
MSB
MSB
Figure 18. SPI Polarity Chart
1
Wireless HC08 Modem
BIT 6
BIT 6
2
BIT 5
BIT 5
3
BIT 4
BIT 4
4
BIT 3
BIT 3
5
BIT 2
BIT 2
6
BIT 1
BIT 1
7
LSB
8
LSB
MOTOROLA
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