CY29942 Cypress Semiconductor, CY29942 Datasheet - Page 4

• Manufacturer Part Number: CY29942
• Description: 1:18 Clock Distribution Buffer
• Manufacturer: Cypress Semiconductor

AC Parameters
Notes:
Document #: 38-07284 Rev. *B
10. For a specific temperature and voltage, includes output skew.
5.
6.
7.
8.
9.
Fmax
Tpd
FoutDC
Tskew
Tskew(pp)
Tskew(pp)
Tr/Tf
Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with loaded outputs.
Outputs driving 50 transmission lines.
See Figure 1.
50% input duty cycle.
Across temperature and voltage ranges, includes output skew.
Parameter
[5]
Input Frequency
TTL_CLK to Q Delay
Output Duty Cycle
Output-to-Output Skew
Part-to-Part Skew
Part-to-Part Skew
Output Clocks Rise/Fall
Time
Figure 1. LVCMOS_CLK CY29942 Test Reference for V
: V
DD
Z = 50 ohm
[6, 7]
Generator
= 3.3V ±5% or 2.5V ±5%, V
Pulse
Description
Figure 2. LVCMOS Propagation Delay (TPD) Test Reference
LVCMOS_CLK
Q
[9]
[10]
[6, 7, 8]
[6, 7]
Figure 3. Output Duty Cycle (FoutDC)
[6, 7]
Zo = 50 ohm
R
T
= 50 ohm
t
P
t
V
V
Measured at V
V
V
0.8V to 2.0V, V
0.5V to 1.8V, V
DDC
PD
DC = tP / T0 x 100%
DD
DD
DD
DD
CY29942 DUT
= 3.3V ±5% or 2.5V ±5%, Over the specified temperature range
= 3.3V
= 2.5V
= 3.3V
= 2.5V
VTT
T0
Conditions
DD
DD
DD
/2
= 3.3V
= 2.5V
CC
GND
VCC
VCC /2
GND
VCC
Zo = 50 ohm
VCC /2
GND
VCC
= 3.3V and V
VCC /2
R
Min.
1.8
2.3
0.2
45
T
= 50 ohm
CC
VTT
Typ.
3.3
3.8
= 2.5V
Max.
200
200
600
3.8
4.4
1.0
1.3
1.1
55
CY29942
Page 4 of 7
MHz
Unit
ns
ps
ns
ps
ns
%