CY28RS480-1 Cypress Semiconductor, CY28RS480-1 Datasheet - Page 6

• Manufacturer Part Number: CY28RS480-1
• Description: Clock Generator
• Manufacturer: Cypress Semiconductor

Document #: 38-07714 Rev. *C
Byte 5: Control Register 5
Byte 6: Control Register 6
Byte 7: Vendor ID
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@Pup
@Pup
@Pup
HW
HW
HW
HW
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
TEST_MODE
TEST_SEL
SRC[T/C]5
SRC[T/C]4
SRC[T/C]3
SRC[T/C]2
SRC[T/C]1
SRC[T/C]0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
Name
Name
REF
PRELIMINARY
REF/N or Three-state Select
1 = REF/N Clock, 0 = Three-state
Test Clock Mode Entry Control
1 = REF/N or Tri-state mode, 0 = Normal operation
REF Output drive strength
0 = Low drive, 1 = high drive
Reserved
Reserved
Reserved
Reserved
Reserved
SRC[T/C]5 CLKREQ#1 control
1 = SRC[T/C]5 stoppable by CLKREQ#1 pin
0 = SRC[T/C]5 free running
SRC[T/C]4 CLKREQ#1 control
1 = SRC[T/C]4 stoppable by CLKREQ#1 pin
0 = SRC[T/C]4 free running
SRC[T/C]3 CLKREQ#1 control
1 = SRC[T/C]3 stoppable by CLKREQ#1 pin
0 = SRC[T/C]3 free running
SRC[T/C]2 CLKREQ#1 control
1 = SRC[T/C]2 stoppable by CLKREQ#1 pin
0 = SRC[T/C]2 free running
SRC[T/C]1 CLKREQ#1 control
1 = SRC[T/C]1 stoppable by CLKREQ#1 pin
0 = SRC[T/C]1 free running
SRC[T/C]0 CLKREQ#1 control
1 = SRC[T/C]1 stoppable by CLKREQ#1 pin
0 = SRC[T/C]1 free running
Reserved
Reserved
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
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Description
Description
Description
CY28RS480-1
Page 6 of 16
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