CY28412 SpectraLinear, CY28412 Datasheet - Page 4

• Manufacturer Part Number: CY28412
• Description: Clock Generator
• Manufacturer: SpectraLinear

Rev 1.0, November 20, 2006
Table 3. Block Read and Block Write Protocol (continued)
Table 4. Byte Read and Byte Write Protocol
Control Registers
Byte 0:Control Register 0
11:18
20:27
Bit
Bit
Bit
2:8
....
....
....
....
....
....
10
19
28
29
1
9
7
6
5
4
3
2
1
0
......................
Data Byte (N – 1) – 8 bits
Acknowledge from slave
Data Byte N – 8 bits
Acknowledge from slave
Stop
Start
Slave address – 7 bits
Write = 0
Acknowledge from slave
Command Code – 8 bits
'100xxxxx' stands for byte operation, bits[6:0] of the
command code represents the offset of the byte to
be accessed
Acknowledge from slave
Data byte from master – 8 bits
Acknowledge from slave
Stop
@Pup
1
1
1
1
1
1
1
1
Block Write Protocol
Byte Write Protocol
CPUC2_ITP/SRCC6
CPUT2_ITP/SRCT6
Description
Description
SRC[T/C]5
SRC[T/C]4
SRC[T/C]3
SRC[T/C]2
SRC[T/C]1
SRC[T/C]0
SATAT/C]
Name
CPU[T/C]2_ITP/SRC[T/C]6 Output Enable
0 = Disable (Hi-Z), 1 = Enable
SRC[T/C]5 Output Enable
0 = Disable (Hi-Z), 1 = Enable
SRC[T/C]4 Output Enable
0 = Disable (Hi-Z), 1 = Enable
SRC[T/C]3 Output Enable
0 = Disable (Hi-Z), 1 = Enable
SATA[T/C] Output Enable
0 = Disable (Hi-Z), 1 = Enable
SRC[T/C]2 Output Enable
0 = Disable (Hi-Z), 1 = Enable
SRC[T/C]1 Output Enable
0 = Disable (Hi-Z), 1 = Enable
SRC[T/C]0 Output Enable
0 = Disable (Hi-Z), 1 = Enable
39:46
48:55
21:27
30:37
11:18
Bit
47
56
....
....
....
Bit
2:8
10
19
20
28
29
38
39
1
9
Data byte from slave – 8 bits
Data byte from slave – 8 bits
Acknowledge from master
Data byte N from slave – 8 bits
Acknowledge from master
Stop
Acknowledge from master
Start
Slave address – 7 bits
Write = 0
Acknowledge from slave
Command Code – 8 bits
'100xxxxx' stands for byte operation, bits[6:0] of
the command code represents the offset of the
byte to be accessed
Acknowledge from slave
Repeat start
Slave address – 7 bits
Read = 1
Acknowledge from slave
Data byte from slave – 8 bits
Acknowledge from master
Stop
Description
Block Read Protocol
Byte Read Protocol
Description
Description
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CY28412
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