CY28401 Cypress Semiconductor, CY28401 Datasheet - Page 4

• Manufacturer Part Number: CY28401
• Description: 100-MHz Differential Buffer for PCI Express and SATA
• Manufacturer: Cypress Semiconductor

Document #: 38-07592 Rev. **
Byte 0: Control Register 0 (continued)
Byte 1: Control Register 1
Byte 2: Control Register 2
Bit
Bit
Bit
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
@pup
@pup
@pup
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
Name
Name
Name
Reserved
HIGH_BW#
0 = High Bandwidth, 1 = Low bandwidth
PLL/Bypass#
0 = Fanout buffer, 1 = PLL mode
SRC_DIV/2
0 = Divided by 2 mode,1 = Normal (output = input)
DIF_7 Output Enable
0 = Disabled (three-state)
1 = Enabled
DIF_6 Output Enable
0 = Disabled (three-state)
1 = Enabled
DIF_5 Output Enable
0 = Disabled (three-state)
1 = Enabled
DIF_4 Output Enable
0 = Disabled (three-state)
1 = Enabled
DIF_3 Output Enable
0 = Disabled (three-state)
1 = Enabled
DIF_2 Output Enable
0 = Disabled (three-state)
1 = Enabled
DIF_1 Output Enable
0 = Disabled (three-state)
1 = Enabled
DIF_0 Output Enable
0 = Disabled (three-state)
1 = Enabled
Allow Control DIF_7 with assertion of SRC_STOP#
0 = Free-running
1 = Stopped with SRC_STOP#
Allow Control DIF_6 with assertion of SRC_STOP#
0 = Free-running
1 = Stopped with SRC_STOP#
Allow Control DIF_5 with assertion of SRC_STOP#
0 = Free-running
1 = Stopped with SRC_STOP#
Allow Control DIF_4 with assertion of SRC_STOP#
0 = Free-running
1 = Stopped with SRC_STOP#
Allow Control DIF_3 with assertion of SRC_STOP#
0 = Free-running
1 = Stopped with SRC_STOP#
Description
Description
Description
CY28401
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