AN2156 Freescale Semiconductor / Motorola, AN2156 Datasheet - Page 5
AN2156
Manufacturer Part Number
AN2156
Description
Programming and Erasing FLASH and EEPROM Memories on the MC68HC908AS60A/AZ60A
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
1.AN2156.pdf
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AN2156
MOTOROLA
Technology
Bus clock frequency
Algorithm
Bit-erased state
Programming minimum size
64 bytes programming time
60 Kbytes programming time
Erase size and time
Erase/program the block
Block protect size
Row erase endurance
Row program endurance
Data retention
(Note: Does not refer to
requirement
protect register
erasing/programming the
array)
Freescale Semiconductor, Inc.
For More Information On This Product,
UDR (2TS)
The bus clock must be such that,
Multiple pulses using
margin read
“0”
8 bytes
Typical 80 ms
Typical 77.5 s
Minimum 100 ms for all sizes:
64 bytes, 512 bytes, 16 Kbytes,
High voltage is required on IRQ pin
16 K, 24 K, 28 K, 32 K
Minimum 100 cycles
Minimum 100 cycles
Minimum 10 years
when divided by a prescaler of 1, 2,
or 4, yields a frequency of
1.8 MHz–2.5 MHz
32 Kbytes
Table 2. FLASH Differences
MC68HC908AS60/AZ60
Go to: www.freescale.com
MC68HC908AS60A/AZ60A vs. MC68HC908AS60/AZ60
Minimum 1 MHz
Maximum 8.4 MHz
One fixed pulse
128 bytes: minimum 1 ms
32 Kbytes: minimum 4 ms
High voltage is NOT required on IRQ
128-byte increments except that
UDR (SST)
“1”
64 bytes
Minimum 1.94 ms
Minimum 1.85 s
Minimum 10,000 cycles
Minimum 10,000 cycles
Minimum 10 years
pin
locations $7F00– $7FFF and
$FF00–$FFFF (255 bytes each)
are protected as one block
MC68HC908AS60A/AZ60A
Application Note
5
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