CY26114 Cypress Semiconductor, CY26114 Datasheet - Page 3

• Manufacturer Part Number: CY26114
• Description: One-PLL Clock Generator
• Manufacturer: Cypress Semiconductor

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DC Electrical Characteristics
AC Electrical Characteristics
Document #: 38-07098 Rev. *A
I
I
I
I
V
V
I
I
I
DC
t
t
t
t
t5
t9
t10
Note:
Parameter
Parameter
OH
OL
OH
OL
VDD
VDDL
VDDL
3
3
4
4
2.
IH
IL
Not 100% tested.
[2]
[2]
Output High Current
Output Low Current
Output High Current
Output Low Current
Input High Voltage
Input Low Voltage
Supply Current
Supply Current
Supply Current
Output Duty Cycle
Rising Edge Rate
Rising Edge Rate
Falling Edge Rate
Falling Edge Rate
Skew
Clock Jitter
PLL Lock Time
Name
Name
CLK
CLK
Figure 2. Rise Time and Fall Time Definitions.
Figure 1. Duty Cycle Definitions: DC = t2/t1.
Duty Cycle is defined in Figure 1; t1/t2, 50% of
V
Output Clock Rise Time, 20% – 80% of
V
Output Clock Rise Time, 20% – 80% of
V
Output Clock Fall Time, 80% – 20% of
V
Output Clock Fall Time, 80% – 20% of
V
Delay between related outputs at rising edge
Peak to Peak period jitter
V
V
V
V
CMOS levels, 70% of V
CMOS levels, 30% of V
AV
V
V
DD
DD
DDL
DD
DDL
OH
OL
OH
OL
DDL
DDL
DD
/V
/V
= 0.5, V
= 0.5, V
= V
= V
= 2.5V
= 2.5V
/V
DDL
DDL
Current (V
Current (V
t3
DD
DD
DDL
20%
50%
= 3.3V
= 3.3V
t1
t2
Current
80%
– 0.5, V
DD
DDL
– 0.5, V
/V
DDL
DDL
Description
Description
= 2.5V
DDL
DD
= 2.625V)
DDL
= 3.6V)
= 3.3V
t4
/V
50%
DD
DD
=2.5V
DDL
= 3.3V
Min.
Min.
0.7
12
12
0.8
0.6
0.8
0.6
8
8
45
Typ.
Typ.
1.4
1.2
1.4
1.2
24
24
16
16
50
Max.
Max.
250
200
0.3
55
20
15
25
3
CY26114
Page 3 of 5
V/ns
V/ns
V/ns
V/ns
VDD
VDD
Unit
Unit
ms
mA
mA
mA
mA
mA
mA
mA
ps
ps
%