CY24130 Cypress Semiconductor, CY24130 Datasheet - Page 3

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CY24130

Manufacturer Part Number
CY24130
Description
HOTLink SMPTE Receiver Training Clock
Manufacturer
Cypress Semiconductor
Datasheet
www.DataSheet4U.com
DataSheet U .com
4
Document #: 38-07711 Rev. **
DC Electrical Specifications
AC Electrical Specifications
Test and Measurement Set-up
Voltage and Timing Definitions
Note:
I
I
I
I
V
V
I
I
DC
ER
EF
t
t
1. Not 100% tested.
Parameter
OH
OL
IH
IL
VDD
VDDL
9
10
Parameter
IH
IL
[1]
[1]
Output High Current
Output Low Current
Input High Current
Input Low Current
Input High Voltage
Input Low Voltage
Supply Current
Supply Current
Output Duty Cycle
Rising Edge Rate
Falling Edge Rate
Clock Jitter
PLL Lock Time
Name
Name
Clock
Output
V
DDs
0.1 µF
Duty Cycle is defined in Figure 1; t
V
Output Clock Edge Rate, Measured from 20% to
80% of V
Output Clock Edge Rate, Measured from 80% to
20% of V
CLKA Peak-Peak Period Jitter
DD
V
V
V
V
CMOS levels, 70% of V
CMOS levels, 30% of V
AV
V
OH
OL
IH
IL
DDL
DD
Figure 1. Duty Cycle Definitions
= 0V
= V
= 0.5, V
= V
/V
Current
DD
DD
t
DD
DD
2
DD
, C
, C
GND
Current
– 0.5, V
LOAD
LOAD
DD
/V
Description
t
Description
1
DUT
DDL
= 15 pF. See Figure 2.
= 15 pF. See Figure 2.
DD
= 3.3V
/V
DD
DD
DDL
= 3.3V
1
/t
2
, 50% of
V
50% of V
0V
C
DD
LOAD
Outputs
Min.
Min.
DD
0.7
12
12
0.8
0.8
45
Typ.
Typ.
100
1.4
1.4
24
24
16
14
50
5
Max.
Max.
CY24130
55
0.3
10
10
3
Page 3 of 5
V/ns
V/ns
Unit
Unit
ms
mA
mA
mA
mA
ps
%
µA
µA
V
V

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