CY2291SC-XXX Cypress Semiconductor, CY2291SC-XXX Datasheet - Page 8

• Manufacturer Part Number: CY2291SC-XXX
• Description: Three-PLL General Purpose EPROM Programmable Clock Generator
• Manufacturer: Cypress Semiconductor

Switching Characteristics, Commercial 3.3V
t
t
t
t
t
t
t
t
t
t
t
t
t
1
3
4
5
6
7
8
9A
9B
9C
9D
10A
10B
Parameter
Output Period
Output Duty
Cycle
Rise Time
Fall Time
Output Disable
Time
Output Enable
Time
Skew
CPUCLK Slew
Clock Jitter
Clock Jitter
Clock Jitter
Clock Jitter
Lock Time for
CPLL
Lock Time for
UPLL and SPLL
Slew Limits
Name
[11]
[14]
[14]
[14]
[14]
Clock output range, 3.3V
operation
Duty cycle for outputs, defined as t
f
Duty cycle for outputs, defined as t
f
Output clock rise time
Output clock fall time
Time for output to enter three-state mode after
SHUTDOWN/OE goes LOW
Time for output to leave three-state mode after
SHUTDOWN/OE goes HIGH
Skew delay between any identical or related
outputs
Peak-to-peak period jitter (t
% of clock period (f
Peak-to-peak period jitter (t
(4 MHz < f
Peak-to-peak period jitter
(16 MHz < f
Peak-to-peak period jitter
(f
Lock Time from Power-Up
Lock Time from Power-Up
CPU PLL Slew Limits
Frequency transition rate
OUT
OUT
OUT
> 66 MHZ
< 66 MHZ
> 50 MHz)
[3, 12, 15]
OUT
OUT
< 16 MHz)
< 50 MHz)
Description
OUT
[13]
[13]
< 4 MHz)
9A
9B
8
CY2291
CY2291F
CY2291
CY2291F
Max. – t
Max. – t
2
2
9A
9B
t
t
1
1
[12]
[12]
min.),
min.)
(66.6 MHz)
(80 MHz)
Min.
12.5
40%
45%
1.0
15
8
8
< 0.25
<0.25
<400
<250
Typ.
50%
50%
<0.5
<0.7
<25
2.5
10
10
3
(76.923 kHz)
(76.923 kHz)
13000
13000
Max.
60%
55%
20.0
66.6
500
350
0.5
15
15
50
80
5
4
1
1
1
CY2291
MHz/
Unit
MHz
MHz
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
%