CY2273A Cypress Semiconductor, CY2273A Datasheet - Page 3

• Manufacturer Part Number: CY2273A
• Description: K6 Clock Synthesizer/Driver
• Manufacturer: Cypress Semiconductor

Pin Summary
Function Table (-1, -2 and -4)
Function Table (-3)
V
V
V
AV
V
XTALIN
XTALOUT
SDRAM7/
PCI_STOP
SDRAM6/
CPU_STOP
SDRAM5/
PWR_DWN
SDRAM[0:4],
[8:11]
SEL0
SEL1
CPUCLK[0:3]
PCICLK[0:5] or
PCICLK[0:3]
PCICLK_F
AGPCLK[0:1]
IOAPIC
REF0
USBCLK
SDATA
SCLK
MODE
Note:
0
0
1
1
0
1
SEL1
2.
SEL0
Name
DDQ3
DDQ2
DDCPU
SS
DD
For best accuracy, use a parallel-resonant crystal, C
[2]
0
1
0
1
SEL0
2
2
CPU/PCI Ratio
[2]
2
2
2.5
2.5
Pins (-1, -4)
6, 14, 19, 30, 36,
48
N/A
42
1
3, 9, 16, 22, 27,
33, 39, 45
4
5
28
29
31
38, 37, 35, 34,
32, 21, 20, 18, 17
26
46
44, 43, 41, 40
8, 10, 11, 12, 13,
15
7
N/A
N/A
2
47
23
24
25
CPU/PCI
Ratio
60.0 MHz
66.67 MHz
CPUCLK[0:3]/SDRAM[0:11]
60.0 MHz
66.67 MHz
75.0 MHz
83.33 MHz
CPUCLK[0:3]
SDRAM[0:11]
Pins (-2)
6, 14, 19, 30, 36,
48
N/A
42
1
3, 9, 16, 22, 27,
33, 39, 45
4
5
28
29
31
38, 37, 35, 34,
32, 21, 20, 18, 17
26
46
44, 43, 41, 40
8, 10, 11, 12
7
13, 15
N/A
2
47
23
24
25
LOAD
= 18 pF.
30.0 MHz
33.33 MHz
30.0 MHz
33.33 MHz
6, 14, 19, 30, 36
48
42
23
3, 9, 16, 22, 27,
33, 39, 45
4
5
28
29
31
38, 37, 35, 34,
32, 21, 20, 18, 17
46
N/A
44, 43, 41, 40
8, 10, 11, 12, 13,
15
7
N/A
47
2
1
24
25
26
PCICLK[0:5]
Pins (-3)
PCICLK_F
30.0 MHz
33.33 MHz
3
PCICLK[0:5],PCICLK_F
60.0 MHz
66.66 MHz
60.0 MHz
66.66 MHz
3.3V Digital voltage supply
IOAPIC Digital voltage supply, 2.5V
CPU Digital voltage supply, 2.5V or 3.3V
Analog voltage supply, 3.3V
Ground
Reference crystal input
Reference crystal feedback
SDRAM clock output. Also, active low control input
to stop PCI clocks, enabled when MODE is LOW.
SDRAM clock output. Also, active low control input
to stop CPU clocks, enabled when MODE is LOW.
SDRAM clock output. Also, active low control input
to power down device, enabled when MODE is LOW.
SDRAM clock outputs
CPU frequency select input, bit 0 (See table below.)
CPU frequency select input, bit 0 (See table below.)
CPU clock outputs
PCI clock outputs, at 30 or 33.33 MHz
Free-running PCI clock output
AGP clock outputs at 60 or 66.66 MHz
IOAPIC clock output
3.3V Reference clock output
USB Clock output at 48 MHz
Serial data input for serial configuration port
Serial clock input for serial configuration port
Mode Select pin for enabling power management
features
Description
(-2 Only)
AGP
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
REF0/IOAPIC
IOAPIC
REF0
48 MHz
48 MHz
48 MHz
48 MHz
CY2273A
48 MHz
48 MHz
USBCLK
USBCLK