CY2037 Cypress Semiconductor, CY2037 Datasheet

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CY2037

Manufacturer Part Number
CY2037
Description
High Accuracy EPROM Programmable PLL Die for Crystal Oscillators
Manufacturer
Cypress Semiconductor
Datasheet
Cypress Semiconductor Corporation
• EPROM-programmable die for in-package programming of
• High resolution PLL with 12 bit multiplier and 10 bit divider Enables synthesis of highly accurate and stable output clock
• EPROM-programmable capacitor tuning array
• Twice programmable die
• Simple 4-wire programming interface
• On-chip oscillator runs from 10–30 MHz crystal
• EPROM-selectable TTL or CMOS duty cycle levels
• Operating frequency
• Sixteen selectable post-divide options, using either PLL or
• Programmable PWR_DWN or OE pin
• Programmable asynchronous or synchronous OE and
• Low Jitter outputs
• 3.3V or 5V operation
• Small Die
• Controlled rise and fall times and output slew rate
PWR_DWN
crystal oscillators
reference oscillator output
PWR_DWN modes
— 1–200 MHz at 5V
— 1–100 MHz at 3.3V
— 1–66.67 MHz at 2.7V
— < ±100ps (pk-pk) at 5V
— < ±125ps (pk-pk) at 3.3V
CY2037 Logic Block Diagram
or OE
X
X
X
G
D
D
OSCILLATOR
CRYSTAL
Features
/ 1, 2, 4, 8, 16, 32, 64, 128
ACCURACY
HIGH
MUX
PLL
3901 North First Street
High Accuracy EPROM Programmable
PRELIMINARY
Enables quick turnaround of custom oscillators
Lowers inventory costs through stocking of blank parts
frequencies with zero or low PPM
Enables fine-tuning of output clock frequency by adjusting
C
Enables reprogramming of programmed part, to correct errors,
and control excess inventory
Enables programming of output frequency after packaging
Lowers cost of oscillator as PLL can be programmed to a high
frequency using a low-frequency, low-cost crystal
Duty cycle centered at 1.5V or V
Provides flexibility to service most TTL or CMOS applications
Services most PC, networking, and consumer applications
Provides flexibility in output configurations and testing
Enables low-power operation or output enable function
Provides flexibility for system applications, through selectable
instantaneous or synchronous change in outputs
Suitable for most PC, consumer, and networking applications
Lowers inventory cost as same die services both applications
Enables encapsulation in small-size, surface mount packages
Has lower EMI than oscillators
CONFIGURATION
Load
PLL Die for Crystal Oscillators
EPROM
of the crystal
San Jose
CLKOUT
PWR_DWN
or OE
AV
Benefits
V
N/C
X
X
X
DD
DD
G
D
D
Die Configuration
CA 95134
DD
1
2
3
4
5
6
7
/2
Top View
December 24, 1997
10
408-943-2600
CY2037
9
8
CLKOUT
AV
V
SS
SS

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CY2037 Summary of contents

Page 1

... Programmable asynchronous or synchronous OE and PWR_DWN modes • Low Jitter outputs — < ±100ps (pk-pk — < ±125ps (pk-pk) at 3.3V • 3. operation • Small Die • Controlled rise and fall times and output slew rate CY2037 Logic Block Diagram PWR_DWN CRYSTAL X D OSCILLATOR ...

Page 2

... The entire configuration can be reprogrammed one time allow- ing programmed inventory to be altered or reused. The CY2037 PLL die has been designed for very high resolu- tion. It has a 12 bit feedback counter multiplier and a 10 bit reference counter divider. This enables the synthesis of highly accurate and stable output clock frequencies with zero or low PPM ...

Page 3

... Min Typ Max = 4.5–5.5V 0.5 2 3.5 = 3.0–3.6V 1.0 4 9.0 6 0.14 0.17 0.20 0.26 0.32 0.38 0.49 0.61 0.73 0.93 1.16 1.39 1.77 2.21 2.65 3.36 4.2 5.04 6.4 8 9.6 3 CY2037 in programming mode. PP Unit MHz MHz MHz R f CRYSTAL LOCATED EXTERNAL TO DIE EPROM BIT TRANSISTOR C = LOAD CAPACITOR Unit ...

Page 4

... Output frequency <= 200 MHz 3.0–3.6V, Output frequency <= 100 MHz 2.7–3.6V, Output frequency <= 66.6 MHz 4.5–5. 3.0–3. 2.7–3. 4.5–5.5V 4.5–5.5V 0. CY2037 Min. Max. Unit 2.7 5.5 V –40 +100 ...

Page 5

... V = 3.0V–3.6V – 0. 3.0V–3.6V – 0. 2.7V–3.6V [2] [2] = 4.5V–5.5V, Fo > 33 MHz, VCO > 100 MHz = 3.0V–3.6V, Fo > 33 MHz, VCO >100 MHz = 3.0V–5.5V, Fo <33 MHz 5 CY2037 Min Typ Max ...

Page 6

... In synchronous mode the powerdown or output 3-state is not initiated until the next falling edge of the output clock asynchronous mode the powerdown or output 3-state occurs within 25ns irrespective of position in the ouput clock cycle. PRELIMINARY CY2037 t 4 1/f 1/f 1/f ...

Page 7

... Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY V IL High Impedance t 7a High Impedance t 7b Die Size Dimensions Operating Range Industrial Wafer Thickness CY2037 1497x1105 microns 14 ±0.5 mils ...

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