AN2094 Freescale Semiconductor / Motorola, AN2094 Datasheet - Page 40

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AN2094

Manufacturer Part Number
AN2094
Description
ITU-T G.729 Implementation on StarCore SC140
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
References
Appendix B
Selected Assembler Operations
B.1 32-Bit DPF Operations
Multiplying a 16-bit integer by a 32-bit DPF can be viewed as the multiplication of a Q31 number by a Q15
number, with the result in Q31 format:
To perform this operation most efficiently using StarCore instructions, we first analyze the operation
where q < p
After the initial shift right, a loses the least significant p bits. After the second shift, a receives q zeros in the least
significant q bits. This is equivalent to zeroing the p least significant bits of a, then right-shifting the result by (p-q)
bits:
where
With this, our formula becomes:
However, in StarCore’s registers the lower half of an ITU 32-bit DPF word is shifted left one bit, and the result of a
StarCore multiply operation is shifted left one bit. Thus, in a StarCore implementation the formula becomes
where SC denotes StarCore-specific operations or value representations.
Example 12 illustrates how this formula can be applied to the multiplication of a 32-bit DPF and a 16-bit integer in
StarCore. In this example, d0 contains the 32-bit DPF, d1.h contains the 16-bit integer, d3 contains -2
and the result is stored in d2.
Multiplying two 32-bit DPF numbers can be viewed as the multiplication of two Q31 numbers, with the result in
Q31 format:
40
L_32 = (hi1 × lo2) << 1 + [(lo1 × lo2) >> 15] << 1
(a >> p) << q
[(a >> p)] << q ≡ (a & 1...10...0) >> (p – q)
L_32= (hi1 × lo2) << 1 + [(lo1 × lo2) & $fffe0000] >> 14
L_32= (hi1 × lo2)
= (hi1 × lo2)
L_32 = (hi1
mpyus d0,d1,d2
and d3,d2
dmacss d0,d1,d2
ITU-T G.729 Implementation on the StarCore™ SC140/SC1400 Cores, Rev. 1
×
SC
Example 12. StarCore Multiplication of 32-Bit DPF and 16-Bit Integer
hi2) << 1 + [(hi1
+ [(lo1
SC
+ {[((lo1
SC
n–p bits
× lo2)
n bits
1...10...0 = [2
n–p bits
p bits
n bits
SC
p bits
SC
×
>> 1) × lo2)
lo2) >> 15 + (lo1
& $fffe0000] >> 16
n
– ( 2
SC
p
– 1) – 1] mod 2
>> 1] & $fffe0000} >> 14
×
hi2) >> 15] << 1
n
= –2
p
Freescale Semiconductor
15
=$fffe0000,

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