AN1934 Freescale Semiconductor / Motorola, AN1934 Datasheet - Page 8

• Manufacturer Part Number: AN1934
• Description: Effects of Skew and Jitter on Clock Tree Design
• Manufacturer: Freescale Semiconductor / Motorola

output–to–output skew from the MPC961P. Note that Figure 14
is not to scale and the magnitudes of the skew and jitter are
actually much smaller than indicated.
in the example. The MC100EP111 has a specification for
output–to–output skew. The MPC961P has parametric values
for Static Phase Offset, phase jitter and output–to–output skew.
The MC100EP223 has values for propagation delay and
output–to–output skew.
MC100EP111 outputs connected to the MC100EP223 and
MPC961P are reversed in time. Thus, the MC100EP111 output
connected to the MC100EP223 is the fastest and the output
connected to the MPC961P is the slowest.
Table 2. Confidence Factor
Table 2 lists the skew and jitter values for the 3 devices used
A similar analysis can be done for the case where the
8
MC100EP223
MC100EP111
MPC961P
Device
t
t
sk(o)
t
pd
t
sk(o)
(∅)
t
jit(∅)
: estimated 700 ps
tsk(o): 70 ps
: estimated 50 ps
Freescale Semiconductor, Inc.
Parameter
: –50 to 225 ps
ÂFÂ @ 150 ps
ÂF ∼ 100 ps
For More Information On This Product,
Go to: www.freescale.com
with the clock source, MC12429, was not mentioned in the
analysis. This value was ignored for this example due to the fact
that all of the clock outputs are derived from the same source,
and jitter that occurs on one output would show up on all
outputs. Applications that have clock outputs derived from
different sources, or have the clock source compared to a
frequency standard, would mandate the need to include the
source jitter in the analysis.
SUMMARY
and may or may not be of importance to a clock tree design.
Understanding data sheet values and applying this knowledge
to clock tree design can sometimes be a real challenge. With
a bit of analysis, one can determine which parameters are
critical to a specific clock tree design and be able to compare
the values of these parameters from one device/vendor to
another. Lastly, data sheet values of jitter are often measured
in a lab environment under the best of conditions. Real designs
with clock drivers on PC boards with other digital circuitry, noisy
power supplies, long traces, and other clock sources can make
the overall jitter worse. Careful design practices are a must for
the best clock driver design.
One last comment on the example is that the jitter associated
Skew and jitter are real characteristics of clock driver devices
MOTOROLA