AN1913D Freescale Semiconductor / Motorola, AN1913D Datasheet - Page 2

• Manufacturer Part Number: AN1913D
• Description: 3-phase BLDC Motor Control with Sensorless Back-EMF ADC Zero Crossing Detection using DSP 56F80x
• Manufacturer: Freescale Semiconductor / Motorola

Motorola DSP Advantages and Features
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Modulation (PWM) module, Analog-to-Digital Converter (ADC), Multi-function Quadrature
Decoder, Timers, communication peripherals (SCI, SPI, CAN), and on-chip Flash and RAM.
Generally, all family members are well suited for motor control applications.
The DSP56F805 family member provides the following peripheral blocks:
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The BLDC motor control greatly benefits from the flexible PWM module, fast ADC and Quadrature
Timer module.
The PWM offers flexibility in its configuration, enabling efficient control of the BLDC motor.
The PWM block has the following features:
Two Pulse Width Modulator modules each with six PWM outputs, three Current Sense inputs, and
four Fault inputs, fault tolerant design with dead-time insertion; supports both center- and
edge-aligned modes
Two 12-bit Analog-to-Digital Converters (ADC) which support two simultaneous conversions;
ADC and PWM modules can be synchronized
Two Quadrature Decoders each with four inputs or two additional Quad Timers
Two dedicated General Purpose Quad Timers totaling six pins: Timer C with two pins and Timer D
with four pins
CAN 2.0 B Module with 2-pin port for transmit and receive
Two Serial Communication Interfaces, each with two pins (or four additional GPIO lines)
Serial Peripheral Interface (SPI) with configurable four-pin port (or four additional GPIO lines)
14 dedicated General Purpose I/O (GPIO) pins, 18 multiplexed GPIO pins
Computer Operating Properly (COP) watchdog timer
Two dedicated external interrupt pins
External reset input pin for hardware reset
External reset output pin for system reset
JTAG/On-Chip Emulation (OnCE™) module for unobtrusive, processor speed-independent
debugging
Software-programmable, Phase Lock Loop-based frequency synthesizer for the DSP core clock
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Program Flash
Program RAM
Data Flash
Boot Flash
Data RAM
Three complementary PWM signal pairs, six independent PWM signals, or a mixture thereof
Complementary channel operation features
Deadtime insertion
BLDC control with BEMF Zero Crossing using ADC
Freescale Semiconductor, Inc.
8188 x 16-bit
DSP56F801
2K x 16-bit
1K x 16-bit
2K x 16-bit
1K x 16-bit
For More Information On This Product,
Table 2-1. Memory Configuration
Go to: www.freescale.com
32252 x 16-bit
DSP56F803
512 x 16-bit
4K x 16-bit
2K x 16-bit
2K x 16-bit
32252 x 16-bit
DSP56F805
512 x 16-bit
4K x 16-bit
2K x 16-bit
2K x16-bit
61436 x 16-bit
DSP56F807
8K x 16-bit
4K x 16-bit
2K x 16-bit
2K x 16-bit