AN1913D Freescale Semiconductor / Motorola, AN1913D Datasheet - Page 17

• Manufacturer Part Number: AN1913D
• Description: 3-phase BLDC Motor Control with Sensorless Back-EMF ADC Zero Crossing Detection using DSP 56F80x
• Manufacturer: Freescale Semiconductor / Motorola

5.3.1.2 ADC Zero Crossing Offset Setting
5.3.2 Back-EMF Zero Crossing Synchronization with PWM
conversion is then two’s compliment data. The other feature associated to the Offset Registers is the
Zero Crossing interrupt. The Zero Crossing interrupt is asserted whenever the ADC conversion result
changes the sign compared to the previous conversion result. Refer to the manual for detailed
information.
This application utilizes ADC Zero Crossing Interrupt to get the Back-EMF Zero Crossing event.
As explained in the previous section, the ADC Offset Register is set to one half of the DC-Bus value.
This is valid at the following conditions:
The ADC Offset Register needs to be continuously updated, to reflect the DC-Bus voltage variation
caused by the ripple of DC-Bus voltage.
The above mentioned conditions are not 100% fulfilled in real drive due to the unbalance in real
sensing circuitry and the motor phases. Therefore, the real application must compensate such
unbalance.
The presented application first sets the ADC Offset Registers[0..3] of all 3-phases to:
Where the Calibration Phase Voltage Coefficient is set to 0.5. Later during the Alignment state the
Calibration Phase Voltage Coefficient is further corrected. The DC-Bus and non-fed phase branch
voltage are measured and the correction is calculated according to the following formula:
Calibration Phase Voltage Coefficient = (ADC Offset Register + Free Phase Branch Voltage)/DC-Bus
voltage
The power stage PWM switching causes high voltage spike on the phase voltages. This voltage spike
is passed to the non-fed phase due to mutual capacitor coupling between the motor windings (see
Figure
phase branch voltage U
•
•
•
5-4). Non-fed phase “branch” voltage U
Motor phases are symmetrical (all 3-phases have same parameters)
hardware dividers for the ADC of the DC-Bus and all 3-phase voltages, have equal ratio
ADC Offset Register[0..3] = Calibration Phase Voltage Coefficient * DC-Bus
BLDC control with BEMF Zero Crossing using ADC
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is then disturbed by PWM switching shown on
Control Technique
17