DS2745 Maxim Integrated Products, DS2745 Datasheet - Page 4

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DS2745

Manufacturer Part Number
DS2745
Description
Low-Cost I2C Battery Monitor
Manufacturer
Maxim Integrated Products
Datasheet

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Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Figure 1. I
All voltages are referenced to V
Offset specified after auto-calibration cycle and Current Offset Bias register (COBR) set to 00h.
To properly enter sleep mode, SMOD=1, and the application should hold SDA and SCL low for longer
than the maximum t
NBEN = 0, Current Offset Bias Register (COBR) set to 00h, and Accumulation Bias Register (ABR)
set to 00h.
Parameters guaranteed by design.
Timing must be fast enough to prevent the DS2745 from entering sleep mode due to SDA,SCL low
for period >
t
f
The maximum t
SCL
signal.
This device internally provides a hold time of at least 100 ns for the SDA signal (referred to the
VIHmin of
the SCL signal) to bridge the undefined region of the falling edge of SCL.
Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.
C
The first voltage measurement after writing the ACR or after device POR is not valid.
SLEEP
SCL
2
B
total capacitance of one bus line in pF.
C Bus Timing Diagram
must meet the minimum clock low time plus the rise/fall times.
.
HD:DAT
SLEEP
has only to be met if the device does not stretch the LOW period (t
.
SS
.
4 of 15
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2
C Battery Monitor
LOW
) of the

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