DS2745 Maxim Integrated Products, DS2745 Datasheet - Page 14

• Manufacturer Part Number: DS2745
• Description: Low-Cost I2C Battery Monitor
• Manufacturer: Maxim Integrated Products

Write Data Protocol
The write data protocol is used to write to register and shadow RAM data to the DS2745 starting at memory
address MAddr. Data0 represents the data written to MAddr, Data1 represents the data written to MAddr + 1 and
DataN represents the last data byte, written to MAddr + N. The master indicates the end of a write transaction by
sending a STOP or Repeated START after receiving the last acknowledge bit.
The msb of the data to be stored at address MAddr can be written immediately after the MAddr byte is
acknowledged. Because the address is automatically incremented after the least significant bit (lsb) of each byte is
received by the DS2745, the msb of the data at address MAddr + 1 is can be written immediately after the
acknowledgement of the data at address MAddr. If the bus master continues an auto-incremented write transaction
beyond address FFh, the DS2745 ignores the data. Data is also ignored on writes to read-only addresses and
reserved addresses. Incomplete bytes and bytes that are Not Acknowledged by the DS2745 are not written to
memory.
Read Data Protocol
The Read Data protocol is used to read register and shadow RAM data from the DS2745 starting at memory
address specified by MAddr. Data0 represents the data byte in memory location MAddr, Data1 represents the data
from MAddr + 1 and DataN represents the last byte read by the master.
Data is returned beginning with the most significant bit (msb) of the data in MAddr. Because the address is
automatically incremented after the least significant bit (lsb) of each byte is returned, the msb of the data at
address MAddr + 1 is available to the host immediately after the acknowledgement of the data at address MAddr. If
the bus master continues to read beyond address FFh, the DS2745 outputs data values of FFh. Addresses labeled
“Reserved” in the memory map return undefined data. The bus master terminates the read transaction at any byte
boundary by issuing a No Acknowledge followed by a STOP or Repeated START.
PACKAGE INFORMATION
For the latest package outline information, go to www.maxim-ic.com/packages.
PACKAGE TYPE
8 MAX
S SAddr W A MAddr A Data0 A Data1 A … DataN A P
S SAddr W A MAddr A Sr SAddr R A Data0 A Data1 A … DataN N P
PACKAGE CODE
U8+1
DOCUMENT NO.
21-0036
14 of 15
DS2745 Low-Cost I
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2
C Battery Monitor