DS2482-100 Dallas Semiconducotr, DS2482-100 Datasheet - Page 7

• Manufacturer Part Number: DS2482-100
• Description: Single-Channel 1-Wire Master
• Manufacturer: Dallas Semiconducotr

Strong Pullup (SPU)
The SPU bit controls whether the DS2482 will apply a low impedance pullup to V
bit of either a 1-Wire Write Byte command or after a 1-Wire Single Bit command has completed. The strong
pullup feature is commonly used with 1-Wire EEPROM devices when copying scratchpad data to the main memory
or when performing a SHA-1 computation, and with parasitically powered temperature sensors or A-to-D
converters. The respective device data sheets specify the location in the communications protocol after which the
strong pullup should be applied. The SPU bit in the Configuration register of the DS2482 must be set immediately
prior to issuing the command that puts the 1-Wire device into the state where it needs the extra power.
If SPU is 1, the DS2482 applies active pullup to the rising edge of the time slot in which the strong pullup starts,
regardless of the APU bit setting. However, in contrast to setting APU = 1 for active pullup, the low-impedance
pullup does not end after t
until either the next 1-Wire communication command is issued (the typical case), the Configuration register is
written to with the SPU bit being 0, or the Device Reset command is issued. The PCTLZ control output is active low
for the entire duration of the low-impedance pullup, enabling an external p-channel MOSFET to supply additional
power to the 1-Wire line. PCTLZ remains inactive (high) at all other time slots that do not use the strong pullup
feature. Additionally, when the pullup ends, the SPU bit is automatically reset to 0. Using the strong pullup does not
change the state of the APU bit in the Configuration register.
Figure 4. Low-Impedance Pullup Timing
1-Wire Speed (1WS)
The 1WS bit determines the timing of any 1-Wire communication generated by the DS2482. All 1-Wire slave
devices support standard speed (1WS = 0), where the transfer of a single bit (t
65µs. Many 1-Wire device can also communicate at a higher data rate, called Overdrive speed. To change from
standard to Overdrive speed, a 1-Wire device needs to receive an Overdrive Skip ROM or Overdrive Match ROM
command, as explained in the device data sheets. The change in speed occurs immediately after the 1-Wire device
has received the speed-changing command code. The DS2482 must take part in this speed change to stay
synchronized. This is accomplished by writing to the Configuration register with the 1WS bit being 1 immediately
after the 1-Wire Byte command that changes the speed of a 1-Wire device. Writing to the Configuration register
with the 1WS bit being 0 followed by a 1-Wire Reset command changes the DS2482 and any 1-Wire devices on
the active 1-Wire line back to standard speed.
Status Register
The read-only Status register is the general means for the DS2482 to report bit-type data from the 1-Wire side,
1-Wire busy status and its own reset status to the host processor. All 1-Wire communication commands and the
Device Reset command position the read pointer at the Status register for the host processor to read with minimal
protocol overhead. Status information is updated during the execution of certain commands only. Details are given
in the description of the various status bits below.
Status Register Bit Assignment
bit 7
DIR
bit 6
TSB
V
0V
cc
SBR
bit 5
Pull-up
APUOT
RST
bit 4
Write 1
Last bit of 1-Wire Write Byte or 1-Wire Single Bit Function
is expired. Instead, as shown in Figure 4, the low-impedance pullup remains active
bit 3
LL
bit 2
SD
DS2482 Pull-down
Write 0
Edges with
active pull-up
t
SLOT
PPD
bit 1
7 of 21
1WB
bit 0
DS2482 Low Impedance Pull-up
SLOT
CC
in Figure 4) is completed within
on the 1-Wire line after the last
Next
Time
Slot