UPD78323 NEC, UPD78323 Datasheet - Page 32
UPD78323
Manufacturer Part Number
UPD78323
Description
16/8-BIT SINGLE-CHIP MICROCONTROLLER
Manufacturer
NEC
Datasheet
1.UPD78323.pdf
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32
3.6
in Figure 3-1.
to the standby mode (STOP).
the reverse phase of the clock signal to the X2 pin. The X2 pin can also be left open.
Caution When using external clocks, do not set the STBC STP bit.
and fx for external clocks) into two parts.
The clock generator generates and controls internal system clocks (CLK) supplied to the CPU. It is configured as shown
The system clock oscillator oscillates by a crystal resonator connected to X1 and X2 pins. It stops oscillating when set
External clocks can be input to the system clock oscillator. In such cases, input a clock signal to the X1 pin and input
The divider generates internal system clocks (f
CLOCK GENERATOR
Remarks
1. f
2. f
3. f
XX
X
CLK
: Crystal oscillator frequency
: External clock frequency
: Internal system clock frequency
Figure 3-1. Block Diagram of Clock Generator
X1
X2
STOP Mode
System
Clock
Generator
CLK
) by dividing a system clock oscillator output (fxx for crystal oscillation
f
XX
or f
X
Divider
1/2
f
CLK
PD78323, 78324
Internal System
Clock (CLK)
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