AN1139 STMicroelectronics, AN1139 Datasheet - Page 16

• Manufacturer Part Number: AN1139
• Description: L6254 - L6268 - L6269 12V DISK DRIVE POWER COMBO IC
• Manufacturer: STMicroelectronics

AN1139 APPLICATION NOTE
4.1.3 Resynchronization
The Resynchronization is the ability to spin-up the motor without going through the Start-Up routine when the
Power is momentarily lost with the Motor still moving and BEMF is detected. Supposing that the Spindle is run-
ning at a certain speed, when a POR (Power On Reset) occurs, the spindle outputs are tristated and the motor
will coast. If the Power come back, PORB high, the internal circuit will first check for the BEMF and if some con-
secutive zero cross are detected, the system will be able to resynchronize the sequencer and get the motor at
speed again. Please note that when POR condition occurs, most of the internal registers are reset, for this rea-
son, it is important to restore the desired bits value as fast as possible upon POR gets back. Also note that the
PORB stays at low level until Por Delay time expire. The Spindle resynchronization circuit stand-by for the
BEMF (zero cross transition) for a Tsync time, which it is calculated as follow:
•
Example with 20MHz Sys_Clk :
The number of consecutive Zero Cross that the chip needs to detect before resynchronizing depends from the
instant that the system is activated (PORB High and REG#2.1.3.4 =1), after for example a glitch in the power
supply. The first valid zero cross, as it is shown in Figure #5, is set in point #1 (Phase A-B, this is true right afer
POR goes on or whenever R_SEQ bit (Reg#2.2) is toggled). The points (Zero Crosses) between the system
activation and the Resynchronization point (point #2) are the number of Zero Cross that the system has to de-
tect, therefore the time before the resynchronization can initiate. If the motor is coasting and the chip is activated
between point 1 and 2, the number of zero cross necessary will be 7. If the chip will be activated between point
6 and 1 the chip will resynchronize after two zero crosses. If the Spindle outputs are disabled by resetting (=0)
the SPIN_EN bit (Reg#2.4), while the motor was spinning, the system will keep track of the zero crosses and
it will resynchronize at the next zero cross upon the SPIN_EN bit is re-asserted.
Figure 5. Resynchronization TiminG
After START_UP, RUN and SPIN_EN bits are set (REG#2.1.3.4=1), the system is halted waiting for a zero
cross to occur within a Tsync time as explained before. If not enough zero crosses are detected, after Tsync
time, the internal Align&GO algorithm is initied. If another Start-Up is required (i.e. Inductive sense), it is man-
datory to reset the SPIN_EN bit before the end of the resynchronization time in order to avoid the internal Start-
Up to be initiated. In other word, the external P, in parallel with the chip, needs to keep track the time and
16/64
5.
-------------------------- -
SYS_CLK
8.4
10
6
1
A-B A-C B-C B-A C-A C-B A-B A-C B-C
Spindle Resyncronization Time - Tsync (mS)
First valid z.c.
2
Resynchronization
Tsync
3
4
=
8.4
------------------- -
20
5
10
10
6
6
6
=
420ms
1
First valid z.c.
2
.
Resynchronization
3
PHASE A
PHASE B
PHASE C