DSP56311CE1K34A Motorola Inc, DSP56311CE1K34A Datasheet - Page 3

• Manufacturer Part Number: DSP56311CE1K34A
• Description: DSP56311 Device Errata for Mask
• Manufacturer: Motorola Inc

Freescale Semiconductor
ED9
ED15
ED17
ED20
ED24
ED26
Description (added 1/27/98):
When the SCI is configured in Synchronous mode, internal clock, and all the SCI
pins are enabled simultaneously, an extra pulse of 1 DSP clock length is provided on
the SCLK pin.
Workaround:
This is not a bug, but a specification update.
Description (added 7/21/98):
The DRAM Control Register (DCR) should not be changed while refresh is
enabled. If refresh is enabled only a write operation that disables refresh is allowed.
Workaround:
First disable refresh by clearing the BREN bit, than change other bits in the DCR
register, and finally enable refresh by setting the BREN bit.
Description (added 9/28/98):
In all DSP563xx technical data sheets, a note is to be added under “AC Electrical
Characteristics” that although the minimum value for “Frequency of Extal” is
0MHz, the device AC test conditions are 15MHz and rated speed.
Workaround:
N/A
Description (added 11/24/98):
In the Technical Data sheet Voh-TTL should be listed at 2.4 Volts, not as:
Workaround: This is a documentation update.
Description (added 11/24/98):
The technical data sheet supplies a maximum value for internal supply current in
Normal, Wait, and Stop modes. These values will be removed because we will
specify only a “Typical” current.
Workaround: This is a documentation update.
Description (added 1/6/99):
The specification DMA Chapter is wrong.
“Due to the DSP56300 Core pipeline, after DE bit in DCRx is set, the corresponding
DTDx bit in DSTR will be cleared only after two instruction cycles.”
Should be replaced with:
“Due to the DSP56300 Core pipeline, after DE bit in DCRx is set, the corresponding
DTDx bit in DSTR will be cleared only after three instruction cycles.”
1.
2.
TTL = Vcc-0.4
Enable an SCI pin other than SCLK.
In the next instruction, enable the remaining SCI pins, including the
SCLK pin.
DSP56311 Device Errata for Mask 1K34A, Rev. 5
Documentation Errata
1K34A
1K34A
1K34A
1K34A
1K34A
1K34A
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