87C51F Intel Corporation, 87C51F Datasheet - Page 14
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87C51F
Manufacturer Part Number
87C51F
Description
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
Manufacturer
Intel Corporation
Datasheet
1.87C51F.pdf
(18 pages)
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AUTOMOTIVE 87C51FA FB FC FC-20
AC TESTING INPUT OUTPUT WAVEFORMS
DEFINITION OF TERMS
(EPROM PROGRAMMING)
ADDRESS LINES P1 0 – P1 7 P2 0 – P2 5 P3 4 –
P3 5 respectively for A0– A13
DATA LINES P0 0– P0 7 for D0 – D7
CONTROL SIGNALS RST PSEN P2 6 P2 7 P3 3
P3 6 P3 7
PROGRAM SIGNALS ALE PROG EA V
14
AC Inputs during testing are driven at V
and 0 45V for a Logic ‘‘0’’ Timing measurements are made at V
min for a Logic ‘‘1’’ and V
Program Code Data
Verify Code Data
Program Encryption
Array Address 0– 3FH
Program Lock
Bits
Read Signature Byte
Mode
Bit 1
Bit 2
Bit 3
IL
max for a Logic ‘‘0’’
RST
H
H
H
H
H
H
H
CC
b
Table 3 EPROM Programming Modes
0 5V for a Logic ‘‘1’’
PSEN
L
L
L
L
L
L
L
270961– 17
PP
PROG
ALE
IH
H
H
FLOAT WAVEFORMS
PROGRAMMING THE EPROM
The part must be running with a 4 MHz to 6 MHz
oscillator The address of an EPROM location to be
programmed is applied to address lines while the
code byte to be programmed in that location is ap-
plied to data lines Control and program signals must
be held at the levels indicated in Table 3 Normally
EA V
PROG is to be pulsed The EA V
ALE PROG is pulsed low and then EA V
turned to a high (also refer to timing diagrams)
Exceeding the V
time could damage the device permanently The
V
glitches
12 75V
12 75V
12 75V
12 75V
12 75V
PP
For timing purposes a port pin is no longer floating when a
100 mV change from load voltage occurs and begins to float
when a 100 mV change from the loaded V
I
EA
V
OL
H
H
PP
I
source must be well regulated and free of
OH t g
PP
is held at logic high until just before ALE
P2 6
20 mA
H
H
H
L
L
L
L
PP
P2 7
H
H
H
H
maximum for any amount of
L
L
L
NOTE
P3 3
H
H
H
H
H
L
L
PP
OH
is raised to V
P3 6
V
OL
H
H
H
H
L
L
L
270961 –18
level occurs
PP
P3 7
is re-
H
H
H
H
L
L
L
PP