87C196KS Intel Corporation, 87C196KS Datasheet
87C196KS
Related parts for 87C196KS
87C196KS Summary of contents
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... ADVANCED 16-BIT CHMOS MICROCONTROLLER ( High Performance CHMOS 16-Bit CPU Kbytes of On-Chip EPROM Kbyte of On-Chip Register RAM 512 Bytes of Additional RAM Y (Code RAM) Register-Register Architecture Y 8 Channel 10-Bit A D with Sample Hold Y 37 Prioritized Interrupt Sources ...
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... Device Pins Package EPROM 87C196KT 68-Pin PLCC 32K 87C196KS 68-Pin PLCC 24K NOTE This is a PRODUCT PREVIEW DATA SHEET The AC and DC parameters contained within this data sheet may change after full automotive temperature characterization of the device has been performed Contact your local sales office before ...
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... Block Diagram 87C196KT 87C196KS 270999 – 1 270999 – ...
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... PIN DESCRIPTIONS Symbol V Main supply voltage ( Digital circuit ground (0V) There are three V SS SSI SSI V Reference for the A D converter ( REF portion of the A D converter and the logic used to read Port 0 Must be connected for A D and Port 0 to function ...
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... I O ports with open drain outputs These pins are shared with the multiplexed address data bus which has strong internal pullups Name and Function 0 BHE both bytes (A0 0 BHE 0) If the WRH function is selected e e 87C196KT 87C196KS 0 selects the e 0 selects the high byte only ...
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... CCB (2018H Byte ‘‘1’’ Enables Powerdown e 1 BW0 See Table ‘‘1’’ WR BHE - ‘‘0’’ WRL WRH ALE ‘‘1’’ ALE - ‘‘0’’ ADV ...
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... REF (8) For PORT0 b (8) For PORT0 (1) XTAL1 Input Pin Only RESET input pin only 87C196KT 87C196KS Max Units 125 MHz (Note 4) Typ Max Units TBD ...
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... DC CHARACTERISTICS (Under Listed Operating Conditions) (Continued) Symbol Parameter V Output Low Voltage OL (Outputs Configured as Complementary) V Output High Voltage OH (Outputs Configured as Complementary) I Input Leakage Current (Std Inputs Input Leakage Current (Port 0) LI1 V SLPINT (P5 4) and HLDA (P2 6) OH1 Output High Voltage in RESET ...
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... OSC OSC OSC OSC OSC OSC OSC number of wait states If mode 0 (1 automatic wait state added) e 87C196KT 87C196KS Max Units ( MHz 250 ns 110 OSC ( ...
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... AC CHARACTERISTICS (Over Specified Operating Conditions) Test Conditions Capacitance Load on All Pins The system must meet these specifications to work with the 87C196KT Symbol Parameter T Address Valid to Ready Setup AVYV T ALE Low to READY Setup LLYV T Non READY Time YLYH T READY Hold after CLKOUT Low ...
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... SYSTEM BUS TIMING If mode 0 operation is selected add 2 Tosc to this time 87C196KT 87C196KS 270999 – ...
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... READY TIMINGS (ONE WAIT STATE) If mode 0 selected one wait state is always added If additional wait states are required add 2 Tosc to these specifica- tions 87C196KT BUSWIDTH TIMINGS If mode 0 selected add 2 Tosc to these specifications 12 270999 – 5 270999 – ...
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... HLDA High to Address No Longer Float HAHAX T HLDA High to BHE INST RD WR Valid HAHBV NOTE 1 To guarantee recognition at next clock 8XC196KT HOLD HOLDA TIMINGS 100 pF Rise and Fall Times e Parameter Min 87C196KT 87C196KS Max Units ( ...
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... BUS MODE 1 AC CHARACTERISTICS Test Conditions Capacitance Load on All Pins The 87C196KT will meet these specifications Symbol Parameter F Frequency on XTAL1 XTAL T XTAL1 Period (1 F OSC XTAL T XTAL1 High to CLKOUT High or Low XHCH T CLKOUT Period CLCL T CLKOUT High Period CHCL ...
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... T to specification OSC (Over Specified Operating Conditions) (Continued) 100 pF Rise and Fall Times e Min No Upper Limit where n number of wait states If mode 0 (1 automatic wait state added) e 87C196KT 87C196KS Max Units OSC ...
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... MODE 1 87C196KT SYSTEM BUS TIMING 16 270999 –23 16 ...
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... HLDA High to BHE INST RD WR Valid HAHBV NOTE 1 To guarantee recognition at next clock MODE 1 8XC196KT HOLD HOLDA TIMINGS (Over Specified Operation Conditions) 100 pF Rise and Fall Times e Parameter Min 87C196KT 87C196KS Max Units ( ...
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... BUS MODE 2 AC CHARACTERISTICS Test Conditions Capacitance Load on All Pins The 87C196KT will meet these specifications Symbol Parameter F Frequency on XTAL1 XTAL T XTAL1 Period (1 F OSC XTAL T XTAL1 High to CLKOUT High or Low XHCH T CLKOUT Period CLCL T CLKOUT High Period CHCL ...
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... RHDX NOTES 1 If Max is exceeded additional wait states will occur 2 If wait states are used add where n OSC c operation is selected add specification OSC 87C196KT 87C196KS (Over Specified Operating Conditions) 100 pF Rise and Fall Times Min Max ...
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... MODE 2 87C196KT SYSTEM BUS TIMING 20 270999 –12 20 ...
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... MODE 2 87C196KT READY TIMINGS (ONE WAIT STATE) MODE 2 87C196KT BUSWIDTH TIMINGS 87C196KT 87C196KS 270999 –13 270999 – ...
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... BUS MODE 2 HOLD HOLDA TIMINGS Test Conditions Capacitance Load on All Pins Symbol T HOLD Setup Time HVCH T CLKOUT Low to HLDA Low CLHAL T CLKOUT Low to BREQ Low CLBRL T HLDA Low to Address Float AZHAL T HLDA Low to BHE INST RD WR Weakly Driven BZHAL ...
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... These values are not tested in production and are based upon theoretical estimates and or laboratory tests 3 Specifications above are advanced information and are subject to change 0) e Min OSC T OSC Rise Fall Time 10 ns Capacitive Pin Load e e 87C196KT 87C196KS 270999 –8 Max Units 100 ...
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... AC CHARACTERISTICS SLAVE PORT SLAVE PORT WAVEFORM (SLPL SLAVE PORT TIMING (SLPL Symbol Parameter T CS Low to ALE Low SELLL High to CS High SRHEH T ALE Low to RD Low SLLRL T RD Low Period SRLRH T WR Low Period SWLWH ...
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... Conditions Signals H High A Address L Low B BHE Valid BR BREQ X No Longer C CLKOUT Valid D DATA Z Floating G Buswidth H HOLD 87C196KT 87C196KS Max Units 16 MHz 250 OSC OSC 270999 –16 270999 – ...
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... EPROM SPECIFICATIONS AC EPROM PROGRAMMING CHARACTERISTICS Operating Conditions Load Capacitance ANGND 25V Symbol Paramter T Address Setup Time AVLL T Address Hold Time LLAX T Data Setup Time DVPL T Data Hold Time PLDX T PALE Pulse Width ...
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... EPROM PROGRAMMING WAVEFORMS SLAVE PROGRAMMING MODE DATA PROGRAM MODE WITH SINGLE PROGRAM PULSE SLAVE PROGRAMMING MODE IN WORD DUMP OR DATA VERIFY MODE WITH AUTO INCREMENT 87C196KT 87C196KS 270999 –19 270999 – ...
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... SLAVE PROGRAMMING MODE TIMING IN DATA PROGRAM MODE WITH REPEATED PROG PULSE AND AUTO INCREMENT AC CHARACTERISTICS SERIAL PORT-SHIFT REGISTER MODE SERIAL PORT TIMING SHIFTING REGISTER MODE Test Conditions 125 Symbol Parameter T Serial Port Clock Period ...
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... Test- ing is performed with V operating frequency After a conversion is started the device is placed in IDLE mode until the conver- sion is complete 87C196KT 87C196KS 270999 –22 REF since it supplies both the CC 5 12V and 16 MHz e REF ...
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... MODE A D OPERATING CONDITIONS Symbol Description T Ambient Temperature A V Digital Supply Voltage CC V Analog Supply Voltage REF T Sample Time SAM T Conversion Time CONV F Oscillator Frequency OSC NOTES 1 V must be within REF CC 2 The value of AD TIME is selected to meet these specifications ...
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... ANGND 87C196KT 87C196KS Max Units 125 ( ( MHz (6) Max Units 256 Level 8 Bits 1 0 LSBs g ...
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... KS ERRATA The following is a list of all known functional devia- tions for 87C196KT KS devices B-step and later devices can be identified by a special mark following the eight digit FPO number on the top of the pack- age For C-step devices this mark is a ‘‘C’’ ...
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... KR or until unless KR 1 Wait bus timing modes do not require an a external latch Designs using 16-bit external memory systems require an external latch on both Port 3 and Port 4 in all bus timing modes 87C196KT 87C196KS n where ...
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... DATA SHEET REVISION HISTORY This is the -007 revision of the 8XC196KT KS Data Sheet The following differences exist between the -006 revision and the -007 revision 1 V estimate added OL3 2 ‘‘Voltage on Analog Input Pin’’ removed Parameter covered by Note 1 V ...