87C196 Intel Corporation, 87C196 Datasheet - Page 23

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87C196

Manufacturer Part Number
87C196
Description
CHMOS 16-BIT MICROCONTROLLER
Manufacturer
Intel Corporation
Datasheet

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t
NORMAL MASTER SLAVE OPERATION
HANDSHAKE OPERATION
NOTE
1 This specification refers to input clocks during slave operation During master operation the device will output a nominal
Timings are guaranteed by design
Timings are guaranteed by design
e
NOTE
The top SCx signal assumes that the SSIO is configured to sample on the leading edge with an active-high clock signal
The SCx signal will be different for other configurations however setup and hold timings will still be the same in relation
to the latching edge of SCx
50% duty cycle clock
Symbol
T
T
T
T
T
T
Symbol
T
T
T
T
T
T
1 state time (125 ns
CHCH
CLCH
CLDV
CLDV1
DVCH
CHDX
CHCH
CLCH
CLDV
CLDV1
DVCH
CLDX
Clock Period
Clock Low Time Clock High Time
Clock Falling to Data Out Valid (Master)
Clock Falling to Data Out Valid (Slave)
Data In Setup to Clock Rising Edge
Clock Rising Edge to Data in Invalid
Clock Period
Clock Low Time Clock High Time
Clock Falling to Data Out Valid (Master)
Clock Falling to Data Out Valid (Slave)
Data In Setup to Clock Rising Edge
Clock Rising Edge to Data in Invalid
16 MHz)
Parameter
Parameter
Figure 6 Synchronous Serial Port
4t
2t
0 5t
0 5t
10
t
4t
2t
0 5t
0 5t
10
t
a
a
Min
Min
b
b
15
15
10
10
1 5t
1 5t
1 5t
1 5t
87C196CA 87C196CB
Max
Max
a
a
a
a
20
50
20
50
272405 –34
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1)
(1)
23

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