PDSP16350 Mitel Networks Corporation, PDSP16350 Datasheet - Page 7

• Manufacturer Part Number: PDSP16350
• Description: I/Q Splitter/NCO
• Manufacturer: Mitel Networks Corporation

phase increment directly from the DIN bus. First the device
must be reset then data is presented on each clock cycle. The
amplitude modulation value is presented on the most signifi-
cant 16 bits while the phase increment is presented on the
least significant 18 bits. The first valid result is obtained after
31 cycles. (In this mode the least significant 16 bits of the
phase increment register remain low).
34 bits of the phase increment register. First the device must
be reset, then the full 34 bits of the phase increment register
are loaded from the DIN bus by taking signal JUMP high
before the rising edge of the clock. Following this new data can
be presented on each cycle of the clock. The amplitude
modulation value is presented on the most significant 16 bits
while the phase increment is presented on the least significant
18 bits. The least significant 16
bits of the phase increment reg-
ister remain fixed at the value
loaded using JUMP. The first
valid result is obtained after 31
cycles. When using JUMP to
load the phase increment regis-
ter, normal operation cannot be
maintained. This is because the
amplitude modulation value
normally presented on the most
significant 16 bits of the DIN bus
are replaced by part of the new
phase increment value.
systems requiring frequency
sweeps. By varying the ampli-
tudes at different frequencies, it
is possible to compensate for
the analog gain characteristics
of amplifiers further along in the
system.
Fig. 4 shows the operation of the device when loading the
Fig.6 shows the operation of the device when using the full
The AM mode is useful in
CLK
MODE
RESET
JUMP
DATA IN
RESULT
Device Reset
1
Apply phase
2
increment
Fig. 6 Amplitude Modulation (34bit frequency accuracy)
PI
3
D17:0
Increment
Phase
Value
Apply first data
Generator
Sin / Cos
4
A
Cordic
16 bit
5
B
D33:18
Converter
Analog
Data
A/D
ture components of an analog waveform, which has been
digitized and which is to be processed using complex tech-
niques. Such a quadrature heterodyning system, alternatively
known as an IQ splitter, is shown in Fig. 5.
of the PDSP16350. If all sixteen inputs are not required, the
unused least significant bits should be tied to ground, and the
more significant inputs connected to the A/D converter. Multi-
plying an input signal with a local oscillator in this manner
produces both sum and difference components. The former
can be removed by using the PDSP16256 Programmable FIR
Filter.
PDSP
16350
It can also be used to generate the in-phase and quadra-
The output from an A/D converter drives the D33:18 inputs
Fig. 5 IQ Split Function
Q
I
32
33
EPROM
First Result Available
34
A
35
B
PDSP16256
36
C
37
D
PDSP16350
DATA
O/P
7