MA5104 Zarlink Semiconductor, MA5104 Datasheet - Page 7

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MA5104

Manufacturer Part Number
MA5104
Description
RADIATION HARD 4096 x 1 BIT STATIC RAM
Manufacturer
Zarlink Semiconductor
Datasheet
MA5104
6
DATA OUT
ADDRESS
1. WE must be high during all address transitions.
2. A write occurs during the overlap (T
3. T
of the write cycle.
4. If the CS low transition occurs simultaneously with, or after, the WE low transition, the output remains in
the high impedance state.
5. DATA OUT is the write data of the current cycle, if selected.
6. DATA OUT is the read data of the next address,if selected.
7. T
DATA IN
WHAV
ELWL
WE
CS
must be met to prevent memory corruption.
is measured from either CS or WE going high or CE going low, whichever is the earlier, to the end
IMPEDANCE
HIGH
T
AVWL
T
ELWL
(7)
WLWH
(4)
) of a low CS, a high CE and a low WE.
T
WLQZ
Figure 12: Write Cycle
T
AVWH
T
T
AVAVW
ELWH
T
WLWH (2)
T
DATA VALID
DVWH
T
WLQH
T
T
T
AXQX
WHAV (3)
WHDX
(5)
(6)

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